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v0.27.0.post1
What's Changed
- [FIX][TIRx][CUDA] Support low-precision, tensor-map and cluster kernels in CUDA-host bundles by @spectrometerHBH in #20489
Full Changelog: v0.27.0.rc1...v0.27.0.post1
v0.27.0
What's Changed
- [Web] Bump tvmjs version to 0.27.0-dev0 on main by @MasterJH5574 in #20095
- [Fix][Relax][ONNX] Handle Split initializer with keep_params_in_input by @hahalfx in #20091
- [Fix][Arith] Isolate Z3 contexts and make memoization deterministic by @tlopex in #20097
- [Fix][TIRx] Fix MSVC build of IndexDataTypeNormalizer by @MasterJH5574 in #20098
- [Python] Bump apache-tvm-ffi floor to >=0.1.13.post2 by @MasterJH5574 in #20094
- [FIX][TIRx] Traverse pointer expressions in tile calls by @jinhongyii in #20089
- [FIX][TIRx] Remap typed buffer expressions during specialization by @jinhongyii in #20090
- [FIX][Relax][ONNX] Keep the static shape of a rank-0 Shape input by @adityasingh2400 in #20092
- [FIX][TIRx] Use typed buffer parameter in pointer config test by @tqchen in #20102
- [FIX][CUDA] Select NVRTC architecture for output format by @jinhongyii in #20100
- [TIRx][CUDA] Add a table-driven PTX dialect and retire tirx.ptx.* by @spectrometerHBH in #20103
- [BugFix][Metal] Preserve pointer address spaces for byte offsets by @GY-Bai in #20101
- [TIRx][CUDA] uint32 index dtypes, directive fixes, and PTX ISA coverage by @spectrometerHBH in #20110
- [SCRIPT] Support PEP 695 symbolic variables in Relax and TIR by @tqchen in #20107
- [Fix][WebGPU] Preserve read-only buffer access modes by @akaashrp in #20113
- [Relax][ONNX] Support lower-rank PRelu slopes by @Aharrypotter in #20115
- [TIRX] Split backend.cuda.intrinsics, fold tcgen05 descriptors, and fix two PTX dialect gaps by @spectrometerHBH in #20120
- [Feature][Relax] Support shared-KV attention with configurable sliding windows by @akaashrp in #20121
- [Web] Avoid redundant memory byte copies by @akaashrp in #20127
- [TIRx][CUDA] Replace source helpers with typed PTX forms by @jinhongyii in #20140
- [Fix][DLight] Reject GEMV accesses unsupported by scheduling by @akaashrp in #20122
- [Fix][Relax][ONNX] Fold Min/Max/Sum/Mean constants elementwise by @aryanputta in #20119
- [Relax][Frontend][TFLite] Support StableHLO shape ops by @Aharrypotter in #20114
- [TIRx][CUDA] Version-gate CUDA 12.8 tensor-map enums and fix registry-test lock leak by @spectrometerHBH in #20154
- [TIRx][CUDA] Add PTX address expressions with immediate byte offsets by @spectrometerHBH in #20153
- [Fix][DLight] Handle rank-one GEMV cache loads by @SamJSui in #20158
- [Relax][ONNX] Support scalar QDQ inputs by @Aharrypotter in #20126
- [BugFix][TE] Initialize nested reductions at the outermost reduction scope by @Gunse11er in #20116
- [Fix][Relax] Track lowered reshape storage aliases by @akaashrp in #20134
- [Fix][WebGPU] Validate and bound symbolic stack allocations by @akaashrp in #20132
- [Web] Avoid tensor-cache record copies by @akaashrp in #20156
- [Fix][TOPI] Fuse GPU scan blocks to avoid CUDA gridDim.y overflow by @chenmiaoming in #20108
- [TIRx][CUDA] Add register and cluster launch controls by @spectrometerHBH in #20159
- [Fix][Relax][Torch] Preserve derived exported input dimensions by @akaashrp in #20128
- [Web] Avoid copies when uploading WASM memory to WebGPU by @akaashrp in #20165
- [Web] Upload pass-through tensor-cache records directly to WebGPU by @akaashrp in #20166
- [IR][TIRX] Add first-class tuple expressions by @tqchen in #20168
- [TIRx][CUDA] Allow newer CUTLASS packages for IKET by @jinhongyii in #20164
- [Fix][Relax] Honor ONNX Reshape zero semantics by @tandede in #20161
- [TIRx][CUDA] Fix single-CTA clusterCtaIdx resolution and accept packed sub-byte tensor-map dtypes by @spectrometerHBH in #20172
- feat(lower-tirx): support PTX movmatrix by @spectrometerHBH in #20171
- [Fix][Relax] Run destructors for non-trivially-destructible types in Arena by @OmarAzizi in #20163
- [Fix][Relax] Lower non-contiguous WebGPU cumsum by @akaashrp in #20133
- [TIRx][CUDA] Preserve explicit single-CTA cluster launches by @spectrometerHBH in #20180
- [Fix][Relax][Frontend][ONNX] Fix Mean/Sum/Min/Max with all-constant inputs by @siyiweigeHEW in #20147
- [Runtime] Add PagedAttentionKVCache checkpoint primitives by @akaashrp in #20035
- [Fix][Relax][Frontend][ONNX] Support broadcastable multi-axis PRelu slopes by @siyiweigeHEW in #20149
- [Fix][Relax][Torch] Align retained expand dimensions by trailing rank by @akaashrp in #20137
- [Fix][Arith] Preserve nested floormod semantics by @tlopex in #20181
- [Feat][Web] Support per-parameter tensor cache encoding by @akaashrp in #20136
- [Codegen][LLVM] Add LLVM 23 compatibility by @tlopex in #20189
- [Web] Decode packed BF16 tensor records in place by @akaashrp in #20167
- [Fix][Relax][Frontend][ONNX] Fix Scatter with indices smaller than data by @siyiweigeHEW in #20187
- [Fix][Relax] Raise error on non-unit dim ONNX Squeeze axis by @OmarAzizi in #20188
- fix(tirx): stabilize multi-GPU correctness tests by @spectrometerHBH in #20213
- [Fix][Relax] Preserve tensor-derived symbols during fusion by @akaashrp in #20139
- [Fix][S-TIR][DLight] Guard non-affine reduction write-back by @Junius-Wynn in #20057
- [Fix][Relax][ONNX] Correct fmod mapping in Mod constant folding by @shoemoney in #20170
- [BugFix][Relax] Preserve take mode in ReorderTakeAfterMatmul by @katrinagui in #20206
- [Fix][Relax][Frontend][ONNX] Support Shape outputs as Gather indices by @Gunse11er in #20179
- [BugFix][Relax] Skip parallel matmul fusion for mixed output dtypes by @katrinagui in #20208
- [Fix][DLight] Localize private scalar reduction buffers by @SamJSui in #20160
- [Fix][Relax][Frontend][ONNX] Fix Softplus accuracy loss from hardcoded threshold by @siyiweigeHEW in #20212
- [Perf][Arith] Materialize Z3 solvers lazily on first query by @tlopex in #20215
- [Fix][Support] Use sbsa-linux CUDA include dir on ARM64 Linux by @spectrometerHBH in #20222
- [TIRx][CUDA] Support exact required block dimensions by @spectrometerHBH in #20223
- [Fix][Relax][ONNX] Where: broadcast size-1 shape expressions, materialize ShapeExpr inputs by @siyiweigeHEW in #20210
- [Fix][Relax] Skip ReorderPermuteDimsAfterConcat for unknown-rank inputs by @yanght27 in #20216
- [Fix][TIRx] Restore IterVar span reflection by @tlopex in #20214
- [Fix][Relax] Normalize negative indices in Gather/Scatter/OneHot Ops by @OmarAzizi in #20219
- [TIRx][CUDA] Align the PTX dialect with PTX ISA 9.2 by @spectrometerHBH in #20224
- [TIRx][CUDA] Allow launch bounds with required block size by @spectrometerHBH in #20226
- [Fix][Arith] Give each materialized Z3 solver a private context by @tlopex in #20221
- [REFACTOR][TE] Represent tensor loads with opaque callees by @tqchen in #20225
- [CUDA][TIRx] Preserve device state during cleanup and skip invalid Top-K references by @spectrometerHBH in #20233
- [Relax][Frontend][ONNX] Support symbolic shapes in Min/Max broadcast by @cchung100m in #20218
- [Fix][Relax] Preserve match-cast storage liveness by @zupengwang in #20220
- [Fix][Relax][Frontend][ONNX] Support Pad-18 axes input, keep wrap for Pad-19 by @siyiweigeHEW in #20152
- [Fix][TIRx] Preserve index semantics when narrowing to int32 by @akaashrp in #20129
- [Fix][Relax][Torch] Materialize runtime scalar shape values by @akaashrp in #20138
- [Fix][Relax][Frontend][ONNX] Validate Flatten axis range in
from_onnxby @siyiweigeHEW in https://github.com/apac...
v0.27.0.rc1
What's Changed
- [Web] Bump tvmjs version to 0.27.0-dev0 on main by @MasterJH5574 in #20095
- [Fix][Relax][ONNX] Handle Split initializer with keep_params_in_input by @hahalfx in #20091
- [Fix][Arith] Isolate Z3 contexts and make memoization deterministic by @tlopex in #20097
- [Fix][TIRx] Fix MSVC build of IndexDataTypeNormalizer by @MasterJH5574 in #20098
- [Python] Bump apache-tvm-ffi floor to >=0.1.13.post2 by @MasterJH5574 in #20094
- [FIX][TIRx] Traverse pointer expressions in tile calls by @jinhongyii in #20089
- [FIX][TIRx] Remap typed buffer expressions during specialization by @jinhongyii in #20090
- [FIX][Relax][ONNX] Keep the static shape of a rank-0 Shape input by @adityasingh2400 in #20092
- [FIX][TIRx] Use typed buffer parameter in pointer config test by @tqchen in #20102
- [FIX][CUDA] Select NVRTC architecture for output format by @jinhongyii in #20100
- [TIRx][CUDA] Add a table-driven PTX dialect and retire tirx.ptx.* by @spectrometerHBH in #20103
- [BugFix][Metal] Preserve pointer address spaces for byte offsets by @GY-Bai in #20101
- [TIRx][CUDA] uint32 index dtypes, directive fixes, and PTX ISA coverage by @spectrometerHBH in #20110
- [SCRIPT] Support PEP 695 symbolic variables in Relax and TIR by @tqchen in #20107
- [Fix][WebGPU] Preserve read-only buffer access modes by @akaashrp in #20113
- [Relax][ONNX] Support lower-rank PRelu slopes by @Aharrypotter in #20115
- [TIRX] Split backend.cuda.intrinsics, fold tcgen05 descriptors, and fix two PTX dialect gaps by @spectrometerHBH in #20120
- [Feature][Relax] Support shared-KV attention with configurable sliding windows by @akaashrp in #20121
- [Web] Avoid redundant memory byte copies by @akaashrp in #20127
- [TIRx][CUDA] Replace source helpers with typed PTX forms by @jinhongyii in #20140
- [Fix][DLight] Reject GEMV accesses unsupported by scheduling by @akaashrp in #20122
- [Fix][Relax][ONNX] Fold Min/Max/Sum/Mean constants elementwise by @aryanputta in #20119
- [Relax][Frontend][TFLite] Support StableHLO shape ops by @Aharrypotter in #20114
- [TIRx][CUDA] Version-gate CUDA 12.8 tensor-map enums and fix registry-test lock leak by @spectrometerHBH in #20154
- [TIRx][CUDA] Add PTX address expressions with immediate byte offsets by @spectrometerHBH in #20153
- [Fix][DLight] Handle rank-one GEMV cache loads by @SamJSui in #20158
- [Relax][ONNX] Support scalar QDQ inputs by @Aharrypotter in #20126
- [BugFix][TE] Initialize nested reductions at the outermost reduction scope by @Gunse11er in #20116
- [Fix][Relax] Track lowered reshape storage aliases by @akaashrp in #20134
- [Fix][WebGPU] Validate and bound symbolic stack allocations by @akaashrp in #20132
- [Web] Avoid tensor-cache record copies by @akaashrp in #20156
- [Fix][TOPI] Fuse GPU scan blocks to avoid CUDA gridDim.y overflow by @chenmiaoming in #20108
- [TIRx][CUDA] Add register and cluster launch controls by @spectrometerHBH in #20159
- [Fix][Relax][Torch] Preserve derived exported input dimensions by @akaashrp in #20128
- [Web] Avoid copies when uploading WASM memory to WebGPU by @akaashrp in #20165
- [Web] Upload pass-through tensor-cache records directly to WebGPU by @akaashrp in #20166
- [IR][TIRX] Add first-class tuple expressions by @tqchen in #20168
- [TIRx][CUDA] Allow newer CUTLASS packages for IKET by @jinhongyii in #20164
- [Fix][Relax] Honor ONNX Reshape zero semantics by @tandede in #20161
- [TIRx][CUDA] Fix single-CTA clusterCtaIdx resolution and accept packed sub-byte tensor-map dtypes by @spectrometerHBH in #20172
- feat(lower-tirx): support PTX movmatrix by @spectrometerHBH in #20171
- [Fix][Relax] Run destructors for non-trivially-destructible types in Arena by @OmarAzizi in #20163
- [Fix][Relax] Lower non-contiguous WebGPU cumsum by @akaashrp in #20133
- [TIRx][CUDA] Preserve explicit single-CTA cluster launches by @spectrometerHBH in #20180
- [Fix][Relax][Frontend][ONNX] Fix Mean/Sum/Min/Max with all-constant inputs by @siyiweigeHEW in #20147
- [Runtime] Add PagedAttentionKVCache checkpoint primitives by @akaashrp in #20035
- [Fix][Relax][Frontend][ONNX] Support broadcastable multi-axis PRelu slopes by @siyiweigeHEW in #20149
- [Fix][Relax][Torch] Align retained expand dimensions by trailing rank by @akaashrp in #20137
- [Fix][Arith] Preserve nested floormod semantics by @tlopex in #20181
- [Feat][Web] Support per-parameter tensor cache encoding by @akaashrp in #20136
- [Codegen][LLVM] Add LLVM 23 compatibility by @tlopex in #20189
- [Web] Decode packed BF16 tensor records in place by @akaashrp in #20167
- [Fix][Relax][Frontend][ONNX] Fix Scatter with indices smaller than data by @siyiweigeHEW in #20187
- [Fix][Relax] Raise error on non-unit dim ONNX Squeeze axis by @OmarAzizi in #20188
- fix(tirx): stabilize multi-GPU correctness tests by @spectrometerHBH in #20213
- [Fix][Relax] Preserve tensor-derived symbols during fusion by @akaashrp in #20139
- [Fix][S-TIR][DLight] Guard non-affine reduction write-back by @Junius-Wynn in #20057
- [Fix][Relax][ONNX] Correct fmod mapping in Mod constant folding by @shoemoney in #20170
- [BugFix][Relax] Preserve take mode in ReorderTakeAfterMatmul by @katrinagui in #20206
- [Fix][Relax][Frontend][ONNX] Support Shape outputs as Gather indices by @Gunse11er in #20179
- [BugFix][Relax] Skip parallel matmul fusion for mixed output dtypes by @katrinagui in #20208
- [Fix][DLight] Localize private scalar reduction buffers by @SamJSui in #20160
- [Fix][Relax][Frontend][ONNX] Fix Softplus accuracy loss from hardcoded threshold by @siyiweigeHEW in #20212
- [Perf][Arith] Materialize Z3 solvers lazily on first query by @tlopex in #20215
- [Fix][Support] Use sbsa-linux CUDA include dir on ARM64 Linux by @spectrometerHBH in #20222
- [TIRx][CUDA] Support exact required block dimensions by @spectrometerHBH in #20223
- [Fix][Relax][ONNX] Where: broadcast size-1 shape expressions, materialize ShapeExpr inputs by @siyiweigeHEW in #20210
- [Fix][Relax] Skip ReorderPermuteDimsAfterConcat for unknown-rank inputs by @yanght27 in #20216
- [Fix][TIRx] Restore IterVar span reflection by @tlopex in #20214
- [Fix][Relax] Normalize negative indices in Gather/Scatter/OneHot Ops by @OmarAzizi in #20219
- [TIRx][CUDA] Align the PTX dialect with PTX ISA 9.2 by @spectrometerHBH in #20224
- [TIRx][CUDA] Allow launch bounds with required block size by @spectrometerHBH in #20226
- [Fix][Arith] Give each materialized Z3 solver a private context by @tlopex in #20221
- [REFACTOR][TE] Represent tensor loads with opaque callees by @tqchen in #20225
- [CUDA][TIRx] Preserve device state during cleanup and skip invalid Top-K references by @spectrometerHBH in #20233
- [Relax][Frontend][ONNX] Support symbolic shapes in Min/Max broadcast by @cchung100m in #20218
- [Fix][Relax] Preserve match-cast storage liveness by @zupengwang in #20220
- [Fix][Relax][Frontend][ONNX] Support Pad-18 axes input, keep wrap for Pad-19 by @siyiweigeHEW in #20152
- [Fix][TIRx] Preserve index semantics when narrowing to int32 by @akaashrp in #20129
- [Fix][Relax][Torch] Materialize runtime scalar shape values by @akaashrp in #20138
- [Fix][Relax][Frontend][ONNX] Validate Flatten axis range in
from_onnxby @siyiweigeHEW in https://github.com/apac...
v0.27.0.rc0
What's Changed
- [Web] Bump tvmjs version to 0.27.0-dev0 on main by @MasterJH5574 in #20095
- [Fix][Relax][ONNX] Handle Split initializer with keep_params_in_input by @hahalfx in #20091
- [Fix][Arith] Isolate Z3 contexts and make memoization deterministic by @tlopex in #20097
- [Fix][TIRx] Fix MSVC build of IndexDataTypeNormalizer by @MasterJH5574 in #20098
- [Python] Bump apache-tvm-ffi floor to >=0.1.13.post2 by @MasterJH5574 in #20094
- [FIX][TIRx] Traverse pointer expressions in tile calls by @jinhongyii in #20089
- [FIX][TIRx] Remap typed buffer expressions during specialization by @jinhongyii in #20090
- [FIX][Relax][ONNX] Keep the static shape of a rank-0 Shape input by @adityasingh2400 in #20092
- [FIX][TIRx] Use typed buffer parameter in pointer config test by @tqchen in #20102
- [FIX][CUDA] Select NVRTC architecture for output format by @jinhongyii in #20100
- [TIRx][CUDA] Add a table-driven PTX dialect and retire tirx.ptx.* by @spectrometerHBH in #20103
- [BugFix][Metal] Preserve pointer address spaces for byte offsets by @GY-Bai in #20101
- [TIRx][CUDA] uint32 index dtypes, directive fixes, and PTX ISA coverage by @spectrometerHBH in #20110
- [SCRIPT] Support PEP 695 symbolic variables in Relax and TIR by @tqchen in #20107
- [Fix][WebGPU] Preserve read-only buffer access modes by @akaashrp in #20113
- [Relax][ONNX] Support lower-rank PRelu slopes by @Aharrypotter in #20115
- [TIRX] Split backend.cuda.intrinsics, fold tcgen05 descriptors, and fix two PTX dialect gaps by @spectrometerHBH in #20120
- [Feature][Relax] Support shared-KV attention with configurable sliding windows by @akaashrp in #20121
- [Web] Avoid redundant memory byte copies by @akaashrp in #20127
- [TIRx][CUDA] Replace source helpers with typed PTX forms by @jinhongyii in #20140
- [Fix][DLight] Reject GEMV accesses unsupported by scheduling by @akaashrp in #20122
- [Fix][Relax][ONNX] Fold Min/Max/Sum/Mean constants elementwise by @aryanputta in #20119
- [Relax][Frontend][TFLite] Support StableHLO shape ops by @Aharrypotter in #20114
- [TIRx][CUDA] Version-gate CUDA 12.8 tensor-map enums and fix registry-test lock leak by @spectrometerHBH in #20154
- [TIRx][CUDA] Add PTX address expressions with immediate byte offsets by @spectrometerHBH in #20153
- [Fix][DLight] Handle rank-one GEMV cache loads by @SamJSui in #20158
- [Relax][ONNX] Support scalar QDQ inputs by @Aharrypotter in #20126
- [BugFix][TE] Initialize nested reductions at the outermost reduction scope by @Gunse11er in #20116
- [Fix][Relax] Track lowered reshape storage aliases by @akaashrp in #20134
- [Fix][WebGPU] Validate and bound symbolic stack allocations by @akaashrp in #20132
- [Web] Avoid tensor-cache record copies by @akaashrp in #20156
- [Fix][TOPI] Fuse GPU scan blocks to avoid CUDA gridDim.y overflow by @chenmiaoming in #20108
- [TIRx][CUDA] Add register and cluster launch controls by @spectrometerHBH in #20159
- [Fix][Relax][Torch] Preserve derived exported input dimensions by @akaashrp in #20128
- [Web] Avoid copies when uploading WASM memory to WebGPU by @akaashrp in #20165
- [Web] Upload pass-through tensor-cache records directly to WebGPU by @akaashrp in #20166
- [IR][TIRX] Add first-class tuple expressions by @tqchen in #20168
- [TIRx][CUDA] Allow newer CUTLASS packages for IKET by @jinhongyii in #20164
- [Fix][Relax] Honor ONNX Reshape zero semantics by @tandede in #20161
- [TIRx][CUDA] Fix single-CTA clusterCtaIdx resolution and accept packed sub-byte tensor-map dtypes by @spectrometerHBH in #20172
- feat(lower-tirx): support PTX movmatrix by @spectrometerHBH in #20171
- [Fix][Relax] Run destructors for non-trivially-destructible types in Arena by @OmarAzizi in #20163
- [Fix][Relax] Lower non-contiguous WebGPU cumsum by @akaashrp in #20133
- [TIRx][CUDA] Preserve explicit single-CTA cluster launches by @spectrometerHBH in #20180
- [Fix][Relax][Frontend][ONNX] Fix Mean/Sum/Min/Max with all-constant inputs by @siyiweigeHEW in #20147
- [Runtime] Add PagedAttentionKVCache checkpoint primitives by @akaashrp in #20035
- [Fix][Relax][Frontend][ONNX] Support broadcastable multi-axis PRelu slopes by @siyiweigeHEW in #20149
- [Fix][Relax][Torch] Align retained expand dimensions by trailing rank by @akaashrp in #20137
- [Fix][Arith] Preserve nested floormod semantics by @tlopex in #20181
- [Feat][Web] Support per-parameter tensor cache encoding by @akaashrp in #20136
- [Codegen][LLVM] Add LLVM 23 compatibility by @tlopex in #20189
- [Web] Decode packed BF16 tensor records in place by @akaashrp in #20167
- [Fix][Relax][Frontend][ONNX] Fix Scatter with indices smaller than data by @siyiweigeHEW in #20187
- [Fix][Relax] Raise error on non-unit dim ONNX Squeeze axis by @OmarAzizi in #20188
- fix(tirx): stabilize multi-GPU correctness tests by @spectrometerHBH in #20213
- [Fix][Relax] Preserve tensor-derived symbols during fusion by @akaashrp in #20139
- [Fix][S-TIR][DLight] Guard non-affine reduction write-back by @Junius-Wynn in #20057
- [Fix][Relax][ONNX] Correct fmod mapping in Mod constant folding by @shoemoney in #20170
- [BugFix][Relax] Preserve take mode in ReorderTakeAfterMatmul by @katrinagui in #20206
- [Fix][Relax][Frontend][ONNX] Support Shape outputs as Gather indices by @Gunse11er in #20179
- [BugFix][Relax] Skip parallel matmul fusion for mixed output dtypes by @katrinagui in #20208
- [Fix][DLight] Localize private scalar reduction buffers by @SamJSui in #20160
- [Fix][Relax][Frontend][ONNX] Fix Softplus accuracy loss from hardcoded threshold by @siyiweigeHEW in #20212
- [Perf][Arith] Materialize Z3 solvers lazily on first query by @tlopex in #20215
- [Fix][Support] Use sbsa-linux CUDA include dir on ARM64 Linux by @spectrometerHBH in #20222
- [TIRx][CUDA] Support exact required block dimensions by @spectrometerHBH in #20223
- [Fix][Relax][ONNX] Where: broadcast size-1 shape expressions, materialize ShapeExpr inputs by @siyiweigeHEW in #20210
- [Fix][Relax] Skip ReorderPermuteDimsAfterConcat for unknown-rank inputs by @yanght27 in #20216
- [Fix][TIRx] Restore IterVar span reflection by @tlopex in #20214
- [Fix][Relax] Normalize negative indices in Gather/Scatter/OneHot Ops by @OmarAzizi in #20219
- [TIRx][CUDA] Align the PTX dialect with PTX ISA 9.2 by @spectrometerHBH in #20224
- [TIRx][CUDA] Allow launch bounds with required block size by @spectrometerHBH in #20226
- [Fix][Arith] Give each materialized Z3 solver a private context by @tlopex in #20221
- [REFACTOR][TE] Represent tensor loads with opaque callees by @tqchen in #20225
- [CUDA][TIRx] Preserve device state during cleanup and skip invalid Top-K references by @spectrometerHBH in #20233
- [Relax][Frontend][ONNX] Support symbolic shapes in Min/Max broadcast by @cchung100m in #20218
- [Fix][Relax] Preserve match-cast storage liveness by @zupengwang in #20220
- [Fix][Relax][Frontend][ONNX] Support Pad-18 axes input, keep wrap for Pad-19 by @siyiweigeHEW in #20152
- [Fix][TIRx] Preserve index semantics when narrowing to int32 by @akaashrp in #20129
- [Fix][Relax][Torch] Materialize runtime scalar shape values by @akaashrp in #20138
- [Fix][Relax][Frontend][ONNX] Validate Flatten axis range in
from_onnxby @siyiweigeHEW in https://github.com/apac...
v0.26.0
What's Changed
- [Relax][PyTorch] Cast non-bool inputs to bool in logical_and converter by @javierdejesusda in #19679
- [CI] Remove PyPI-only tag ref guard from wheel publishing by @tlopex in #19685
- [CI] Target apache-tvm for PyPI wheel publishing by @tlopex in #19686
- [Web] Bump tvmjs version to 0.25.0-dev1 by @akaashrp in #19687
- [Fix] CommReduce could handle 0-dim data by @flashmouse in #19683
- [CI] Pin actions by version tag, trim wheel perms by @MasterJH5574 in #19703
- [Tests] Fix s_tir tests using removed T.block API in TIRx script by @tlopex in #19706
- [CI] Fix release verification script by @MasterJH5574 in #19700
- [Refactor][Meta-schedule] Remove meta-schedule as_string mechanism in favor of default representation by @tlopex in #19709
- [Python] Bump apache-tvm-ffi floor to >=0.1.12 by @MasterJH5574 in #19710
- [Relax][CoreML] Fix CoreML partition pass by @tlopex in #19711
- [Tests] Skip test modules cleanly when optional deps are missing by @tlopex in #19704
- [CI] Merge PR against its target branch instead of main by @MasterJH5574 in #19712
- [CI] Fix CI script test subprocess environment by @tlopex in #19713
- [Codegen][LLVM] Accept splat form in VLA broadcast test by @tlopex in #19716
- [DOCS] Clarify loading serialized artifacts requires a trusted source by @tqchen in #19720
- [REFACTOR][PYTHON] Slim tvm.libinfo to info-only helpers by @tqchen in #19719
- [Codegen][NVPTX] Skip runtime execution in Vulkan codegen tests by @tlopex in #19717
- [REFACTOR][PYTHON] Remove tvm.ffi shim; import tvm_ffi directly by @tqchen in #19721
- [Runtime][Tests] Fix contrib wheel tests by @tlopex in #19714
- [Tests][Disco] Skip CCL tests when runtime support is absent by @tlopex in #19724
- [Tests][Relax] Gate multi-GPU VM test on three devices by @tlopex in #19725
- [REFACTOR][IR] Phase out diagnostic.h for visit-context-aware pass errors by @tqchen in #19722
- [Tests][Hexagon] Lazily import pytest plugin dependencies by @tlopex in #19726
- [Python] Refactor pyproject.toml dependencies by @tlopex in #19723
- [Tests][NNAPI] Skip tests cleanly when remote environment is unavailable by @tlopex in #19730
- [Tests][S-TIR] Fix stale MetaSchedule sketch expectations and migrate let binds to T.let by @tlopex in #19729
- [Tests] Remove test_runtime_ndarray (covered by tvm-ffi) by @tlopex in #19715
- [TIRx] Preserve Triton call_kernel compile options by @tlopex in #19728
- [Relax][PyTorch][DLight] Fix exported-program CUDA test failures by @tlopex in #19732
- [PYTHON] Autoload backends; simplify library loading; remove TVMError for native errors by @tqchen in #19727
- [Script][Tests] Fix dialect redirect module re-execution and stray category-less tirx.intrin_test op by @tlopex in #19731
- [S-TIR][Tests] Fix transform test failures after TIRx bringup by @tlopex in #19735
- [TIRx] Use canonical PTX async script API in s_tir test by @tlopex in #19739
- [Tests] Check WebGPU volatile allreduce annotation structurally by @tlopex in #19740
- [S-TIR] Fix software pipeline offsets for legacy MMA intrinsics by @tlopex in #19742
- [Tests] Fix flaky popen pool executor test by @tlopex in #19746
- [Hexagon][Tests] Clean up stale hexagon tests by @tlopex in #19747
- [Runtime][Disco] Fix session attribute storage, NVSHMEM build, and test gating by @tlopex in #19736
- [CI] Align cuda-python with PyTorch cuda-bindings by @tlopex in #19738
- [Codegen][LLVM][Tests] Gate +v9a vscale_range expectation on LLVM version by @tlopex in #19744
- [Runtime][Tests] Drop int4 from random_fill test, fix dtype error message by @tlopex in #19748
- [Tests][LLVM] Gate stepvector intrinsic rename on LLVM 20 by @tlopex in #19745
- [S-TIR][Tests] Mark test_cp_async_in_if_then_else as xfail by @tlopex in #19751
- [CI] Run s_tir/transform tests in the python-unittest stage by @tlopex in #19737
- [CI] Updated cibw to 4.1.0 by @tlopex in #19754
- [TIRX][Tests] Fix LLVM version gate for vectorized lround by @tlopex in #19753
- [S-TIR][CUDA] Fix legacy predicated cp.async zero fill by @tlopex in #19741
- [Tests][AArch64] Make SVE codegen assertions robust across LLVM versions by @tlopex in #19752
- [Relax][PyTorch] Add logical_or and logical_xor converters by @javierdejesusda in #19756
- [TIRx] Post-bringup follow-ups: op-dispatch, namespaces, launch bounds, gemm-async, backend reorg by @spectrometerHBH in #19757
- [REFACTOR][VM] Move CUDA graph VM builtin back under VM runtime by @tqchen in #19758
- [Runtime][CoreML] Fix FFI casts in CoreML runtime by @tlopex in #19762
- [CI] Drop redundant cmake/ninja install from the Linux wheel CUDA sidecar by @tlopex in #19761
- [REFACTOR][DataType] Phase out target custom datatype support by @tqchen in #19760
- [REFACTOR][TARGET] Cleanup backend target registration by @tqchen in #19759
- [MetaScheduler] Improve print info about builder/runner state by @cbalint13 in #19767
- [REFACTOR][CUDA] Phase out l2 cache flush preproc test by @tqchen in #19768
- [Relax][ONNX] Fix LayerNormalization no-bias zero tensor shape and dtype by @javierdejesusda in #19772
- [Relax][ONNX] Support exclusive option in CumSum by @javierdejesusda in #19773
- [CPP_RPC] Bugfix race conditions and enhance print infos by @cbalint13 in #19778
- [CMAKE] Upgrade TVM build baseline to C++20 by @Ubospica in #19734
- [REFACTOR][CUDA] Phase out cuda_common.h by @tqchen in #19770
- [REFACTOR][PYTHON] Consolidate backend autoload infra by @tqchen in #19769
- [Fix] nn.attention support dynamic batch_size by @flashmouse in #19779
- [Relax][ONNX] Make ReduceMax/ReduceMin NaN propagation order-independent(numpy semantics) by @cchung100m in #19755
- [Docs][CI] Bump tlcpack-sphinx-addon to restore search result summaries by @tlopex in #19782
- [REFACTOR][IR] Cleanup IR naming utilities by @tqchen in #19781
- [CUDA] Narrow the cuda extra from cuda-python to cuda-bindings by @tlopex in #19784
- [AGENT] Migrate agent instructions to vendor-neutral layout by @tqchen in #19783
- [Tests] Modernize test gating by @tlopex in #19777
- [TIRX][CUDA] Framework support for FA4, CLC intrinsics, and nvfp4 tcgen05 GEMM by @spectrometerHBH in #19785
- [Relax][TensorRT] Update TensorRT runtime to 10 by @tlopex in #19789
- [Tests] Make TargetCreation.DeduplicateKeys host-agnostic on AArch64 by @tlopex in #19786
- [Tests] Replace remaining requires_* helpers with standard pytest by @tlopex in #19787
- [TIRx][RISC-V] Use scalable RVV loops for fixed vectorize by @ZephyrLi-pro in #19776
- [Docs] Modernize test-gating documentation by @tlopex in #19788
- [Web] Destroy GPUDevice once on buffer creation error by @guan404ming in #19790
- [REFACTOR] Phase out unused queue and rang license entries by @tqchen in #19794
- [REFACTOR][HEXAGON] Phase out Hexagon app and test wrappers by @tqchen in #19796
- [CI] Pin GitHub Actions to SHA for ASF INFRA compliance by @guan404ming in #19793
- refactor(web): use singular requestFileHandle() instead of requestFileHandles() by @tomayac in #19780
- [REFACTOR][IR] Simplify CallingConv attribute access by @tqchen in #19799
- [CI] Remove Jenkins PR linter step by @tqchen in https://github.com/apache/tv...
v0.26.0.rc0
What's Changed
- [release][Dont Squash] Update version to 0.24.0 and 0.25.0.dev on main branch by @ysh329 in #19446
- [Relax][Frontend] Add ParameterList and ParameterDict containers by @mshr-h in #19495
- [Relax][Frontend][TFLite] Add segment operator mappings by @Aharrypotter in #19491
- [BUGFIX][TIR] Skip bool-typed expressions in CSE by @tqchen in #19502
- [Relax][Frontend][TFLite] Add tests coverage for SPACE_TO_BATCH_ND and BATCH_TO_SPACE_ND by @rknastenka in #19499
- [BugFix][Relax] Fix scatter_elements and scatter_nd CUDA compilation by @as4230 in #19497
- [BugFix][Relax][ONNX] Resolve param Vars in Concat to handle mixed Shape/Tensor inputs by @swjng in #19498
- [Web] Add support for OPFS by @akaashrp in #19494
- [BugFix][Relax][Torch] Honor multi-axis dims in torch.flip converter by @swjng in #19511
- [BugFix][Relax][Torch] Honor
correctionin std/var converter by @swjng in #19512 - [BugFix][S-TIR] Wrap bare scalar bodies in DefaultGPUSchedule to avoid root-block crash by @swjng in #19514
- [Relax][TFLite] Add gather frontend expected IRModule tests by @weicheng-hsu in #19516
- [Relax][PyTorch] Fix segfault in from_exported_program when model uses index_put_ with tuple output by @cchung100m in #19488
- [Relax][Frontend][TFLite] Add Conv3D support by @weicheng-hsu in #19523
- [REFACTOR][IR] Remove dead AttrFunctor template by @tqchen in #19528
- [Relax][ONNX] Normalize negative indices before the take call for
Gatheroperator by @cchung100m in #19525 - [Relax][Frontend] Add TFLite Frontend Support for CONV_3D_TRANSPOSE by @weicheng-hsu in #19530
- [TIR] Add cooperative_tensor builtins and metal.cooperative_tensor storage scope by @oraluben in #19423
- [Relax][Frontend][TFLite] Add initial StableHLO builtin operator support by @Aharrypotter in #19536
- [Contrib] Fix CUDA contrib build after FFI/header cleanups by @MasterJH5574 in #19539
- [BugFix][Relax]: handle ONNX ScatterElements reduction by @THINKER-ONLY in #19527
- [Fix][Relax]: ONNX Clip NaN bounds and preserve input NaN (ORT parity) by @ConvolutedDog in #19535
- [Fix][CI]: remove astral-sh/setup-uv from lint workflow by @ConvolutedDog in #19554
- [Relax][ONNX] Set
max_output_boxes_per_classdefault value to 0 for NonMaxSuppression by @cchung100m in #19547 - [Relax][ONNX] Add ONNX Backend Tests for systematic frontend coverage by @Aharrypotter in #19515
- [Fix][Relax] Lower bool prod as logical all by @ConvolutedDog in #19557
- [Relax][ONNX] Prevent
Divdivide-by-zero crashes by @cchung100m in #19566 - [TIRx] Bringup TIRx Infrastructure by @spectrometerHBH in #19581
- [BugFix][Target][LLVM] Use libm for asin/acos instead of buggy inline Taylor by @swjng in #19567
- [RFC][CodeGen][CUDA]: Gate fast math intrinsic lowering behind target option by @ConvolutedDog in #19565
- [TVMScript] Handle undefined functions when dumping IRModule by @ConvolutedDog in #19583
- [BugFix][Target][LLVM] Route sinh/cosh/atan/asinh/erf through libm extern by @swjng in #19568
- [Relax][ONNX] Fix TopK scalar K extraction in from_onnx by @javierdejesusda in #19573
- [Relax][Frontend][TFLite] Support StableHLO region-based ops and multi-subgraph models by @Aharrypotter in #19587
- [ONNX] Add RMSNormalization converter for ONNX opset 23 by @q55180514 in #19590
- [BUILD] Modularize device runtime into per-backend DSOs by @tqchen in #19594
- [Relax] Normalize negative concat axis in ReorderPermuteDimsAfterConcat by @cchung100m in #19588
- [RPC][Tracker] Bound msg_size to MAX_TRACKER_MSG_BYTES to prevent unbounded buffer growth by @bl4cksku11 in #19586
- [CodeGen][CUDA] Move fast math intrinsic lowering option to PassContext by @tlopex in #19596
- [IR] Add annotations to Call nodes by @tlopex in #19597
- [REFACTOR][RELAX] Fold CalleeCollector into relax DeadCodeElimination by @tqchen in #19603
- [Relax][Frontend][TFLite] Support quantized TFLite import via QDQ decomposition by @Aharrypotter in #19538
- Fix PytestUnknownMarkWarning: Unknown pytest.mark.adreno_clml by @cchung100m in #19602
- [REFACTOR][IR] Cleanup attrs.h: drop NullValue, AttrsNodeReflAdapter, legacy BaseAttrsNode methods by @tqchen in #19607
- [Docs] Reorganize development guide content by @tlopex in #19606
- [REFACTOR] Move src/ir/script_printer.cc to src/script/printer/ by @tqchen in #19611
- [REFACTOR][IR] Phase out src/ir/structural_{hash,equal}.cc to tvm-ffi by @tqchen in #19613
- [REFACTOR][IR] Inline ApplyPassToFunction into relax decompose_ops, delete the util by @tqchen in #19612
- [REFACTOR][TIR][ARITH] Phase out ControlFlowGraph, NarrowPredicateExpression, and rename Simplify to StmtSimplify by @tqchen in #19604
- [REFACTOR][IR] Phase out class Integer and class Bool in Attrs and PassConfig by @tqchen in #19614
- [CMAKE][RUNTIME] Link tvm_rpc with all backend runtime libraries by @cbalint13 in #19617
- [REFACTOR][IR] attrs.h follow-up cleanup: drop legacy vtable / rename / phase out AttrFieldInfo by @tqchen in #19615
- [REFACTOR][TIR] Tie AnnotateDeviceRegions/SplitHostDevice/LowerDeviceKernelLaunch together by @tqchen in #19605
- [Relax][Frontend][TFLite] Support control-flow multi-subgraph operators by @Aharrypotter in #19616
- [Relax][Frontend][TFLite] Add UNIDIRECTIONAL_SEQUENCE_RNN converter by @LudovicoYIN in #19601
- [IR] Rename Call annotations to attrs by @tlopex in #19618
- [REFACTOR][RUNTIME] Phase out tvm::runtime::regex_match by @tqchen in #19620
- [REFACTOR][RUNTIME] Remove leftover microTVM/CRT crumbs by @tqchen in #19622
- [REFACTOR][RUNTIME] Relocate nvtx.h to tvm/support/cuda and make it header-only by @tqchen in #19621
- [REFACTOR][PYTHON] Lift compiler/CLI/process modules from tvm.contrib to tvm.support by @tqchen in #19624
- [REFACTOR][IR][FFI] Bump tvm-ffi (+ SEqHashDef migration) and phase out tvm/ir/repr.h by @tqchen in #19627
- [REFACTOR][IR] Inline ReplaceGlobalVars into AttachGlobalSymbol by @tqchen in #19625
- [BugFix][Vulkan][CodeGen] Change OpControlBarrier to AcquireRelease by @kistenklaus in #19619
- [REFACTOR][RUNTIME] Structural reorganization: locality moves for thread_map, texture, minrpc, disco, contrib by @tqchen in #19628
- [REFACTOR][PYTHON] Consolidate derived_object into tvm.ir.utils by @tqchen in #19630
- [CI] Remove tvm-lint from tvm-bot by @yongwww in #19629
- [REFACTOR][SCRIPT] tvmscript streamline: lift printer.h, restore one-way dep, migrate dialect config to extra_config by @tqchen in #19631
- [REFACTOR][ARITH] Phase out arith/scalable_expression; arith no longer proves over scalable vectors by @tqchen in #19638
- [Relax][Frontend][TFLite] Add REDUCE_WINDOW support by @THINKER-ONLY in #19637
- [Relax][Frontend][TFLite] Add RNN converter by @LudovicoYIN in #19632
- [REFACTOR][IR] Delete class Bool and class Integer boxed-type wrappers by @tqchen in #19636
- [Relax][Frontend][TFLite] Add LSTM and SVDF converter by @LudovicoYIN in #19633
- [Relax][Frontend][TFLite] Add TFLite Resource Variable and Static Hashtable Import Support by @Aharrypotter in #19639
- [TIRx] Fix stale Simplify import in lowering test by @tlopex in #19642
- [Relax][Frontend][TFLite] Support sequence LSTM and RNN operators by @LudovicoYIN in #19634
- [Relax][Frontend][TFLite] Support STABLEHLO_WHILE by @Aharrypotter in #19646
- [Fix] Stabilize layer_norm variance computation with two-pass reduction by @ConvolutedDog in #19643
...
v0.25.0
Introduction
The TVM community has worked since the last release to deliver the following new exciting improvements!
The main tags are below (bold text is with lots of progress): Relax, Frontend, TIR, Runtime, etc.
Please visit the full listing of commits for a complete view: v0.24.0...v0.25.0.
Community
None.
RFCs
None.
Arith
- #19604 - [REFACTOR][TIR]Phase out ControlFlowGraph, NarrowPredicateExpression, and rename Simplify to StmtSimplify
- #19638 - [REFACTOR]Phase out arith/scalable_expression; arith no longer proves over scalable vectors
- #19670 - Memoize IntervalSet variable relaxation to avoid exponential blowup
- #19669 - Gate canonical-simplify LT Case 2 on extra scale == +1
- #19675 - Make Analyzer a tvm-ffi Object
BugFix
- #19502 - [TIR] Skip bool-typed expressions in CSE
- #19497 - [Relax] Fix scatter_elements and scatter_nd CUDA compilation
- #19498 - [Relax][ONNX] Resolve param Vars in Concat to handle mixed Shape/Tensor inputs
- #19511 - [Relax][Torch] Honor multi-axis dims in torch.flip converter
- #19512 - [Relax][Torch] Honor
correctionin std/var converter - #19514 - [S-TIR] Wrap bare scalar bodies in DefaultGPUSchedule to avoid root-block crash
- #19527 - [Relax]: handle ONNX ScatterElements reduction
- #19535 - [Fix][Relax]: ONNX Clip NaN bounds and preserve input NaN (ORT parity)
- #19554 - [Fix][CI]: remove astral-sh/setup-uv from lint workflow
- #19557 - [Fix][Relax] Lower bool prod as logical all
- #19567 - [Target][LLVM] Use libm for asin/acos instead of buggy inline Taylor
- #19568 - [Target][LLVM] Route sinh/cosh/atan/asinh/erf through libm extern
- #19619 - [Vulkan][CodeGen] Change OpControlBarrier to AcquireRelease
- #19643 - [Fix] Stabilize layer_norm variance computation with two-pass reduction
- #19650 - [Fix][Relax] Support ND batched matmul chains in AdjustMatmulOrder pass
- #19683 - [Fix] CommReduce could handle 0-dim data
- #19779 - [Fix] nn.attention support dynamic batch_size
- #19808 - [Fix] Revert C++20-only lambda captures for C++17 build
CI
- #19629 - Remove tvm-lint from tvm-bot
- #19656 - Add cibw-based wheel publishing to PyPI
- #19659 - Wheel publishing follow-ups
- #19665 - Derive the version from Git tags via setuptools_scm
- #19664 - Reformat the macOS repair-wheel-command as a multiline script
- #19697 - Target apache-tvm for PyPI wheel publishing
- #19775 - Merge PR against its target branch instead of main (#19712)
- #19685 - Remove PyPI-only tag ref guard from wheel publishing
- #19703 - Pin actions by version tag, trim wheel perms
- #19706 - [Tests] Fix s_tir tests using removed T.block API in TIRx script
- #19700 - Fix release verification script
- #19704 - [Tests] Skip test modules cleanly when optional deps are missing
- #19713 - Fix CI script test subprocess environment
- #19724 - [Tests][Disco] Skip CCL tests when runtime support is absent
- #19725 - [Tests][Relax] Gate multi-GPU VM test on three devices
- #19726 - [Tests][Hexagon] Lazily import pytest plugin dependencies
- #19730 - [Tests][NNAPI] Skip tests cleanly when remote environment is unavailable
- #19729 - [Tests][S-TIR] Fix stale MetaSchedule sketch expectations and migrate let binds to T.let
- #19715 - [Tests] Remove test_runtime_ndarray (covered by tvm-ffi)
- #19731 - [Script][Tests] Fix dialect redirect module re-execution and stray category-less tirx.intrin_test op
- #19735 - [S-TIR][Tests] Fix transform test failures after TIRx bringup
- #19740 - [Tests] Check WebGPU volatile allreduce annotation structurally
- #19746 - [Tests] Fix flaky popen pool executor test
- #19738 - Align cuda-python with PyTorch cuda-bindings
- #19745 - [Tests][LLVM] Gate stepvector intrinsic rename on LLVM 20
- #19751 - [S-TIR][Tests] Mark test_cp_async_in_if_then_else as xfail
- #19737 - Run s_tir/transform tests in the python-unittest stage
- #19754 - Updated cibw to 4.1.0
- #19752 - [Tests][AArch64] Make SVE codegen assertions robust across LLVM versions
- #19761 - Drop redundant cmake/ninja install from the Linux wheel CUDA sidecar
- #19777 - [Tests] Modernize test gating
- #19786 - [Tests] Make TargetCreation.DeduplicateKeys host-agnostic on AArch64
- #19787 - [Tests] Replace remaining requires_* helpers with standard pytest
- #19793 - Pin GitHub Actions to SHA for ASF INFRA compliance
- #19798 - Remove Jenkins PR linter step
- #19800 - [Tests][Refactor] Remove unused testing helpers
Docs
- #19606 - Reorganize development guide content
- #19720 - Clarify loading serialized artifacts requires a trusted source
- #19782 - [CI] Bump tlcpack-sphinx-addon to restore search result summaries
- #19788 - Modernize test-gating documentation
Frontend
- #19590 - [ONNX] Add RMSNormalization converter for ONNX opset 23
Hexagon
- #19747 - [Tests] Clean up stale hexagon tests
- #19796 - [REFACTOR]Phase out Hexagon app and test wrappers
LLVM
- #19716 - [Codegen]Accept splat form in VLA broadcast test
- #19744 - [Codegen][Tests] Gate +v9a vscale_range expectation on LLVM version
Relax
- #19495 - [Frontend] Add ParameterList and ParameterDict containers
- #19491 - [Frontend][TFLite] Add segment operator mappings
- #19499 - [Frontend][TFLite] Add tests coverage for SPACE_TO_BATCH_ND and BATCH_TO_SPACE_ND
- #19516 - [TFLite] Add gather frontend expected IRModule tests
- #19488 - [PyTorch] Fix segfault in from_exported_program when model uses index_put_ with tuple output
- #19523 - [Frontend][TFLite] Add Conv3D support
- #19525 - [ONNX] Normalize negative indices before the take call for
Gatheroperator - #19530 - [Frontend] Add TFLite Frontend Support for CONV_3D_TRANSPOSE
- #19536 - [Frontend][TFLite] Add initial StableHLO builtin operator support
- #19547 - [ONNX] Set
max_output_boxes_per_classdefault value to 0 for NonMaxSuppression - #19515 - [ONNX] Add ONNX Backend Tests for systematic frontend coverage
- #19566 - [ONNX] Prevent
Divdivide-by-zero crashes - #19573 - [ONNX] Fix TopK scalar K extraction in from_onnx
- #19587 - [Frontend][TFLite] Support StableHLO region-based ops and multi-subgraph models
- [#19588](#1...
v0.25.0.rc1
What's Changed
- [CI] Merge PR against its target branch instead of main (#19712) by @MasterJH5574 in #19775
- [RELEASE] Backport main to prepare v0.25.0.rc1 by @MasterJH5574 in #19774
- [v0.25.0] Backport recent main to prepare v0.25.0.rc1 by @MasterJH5574 in #19792
- [CMAKE] Revert build baseline to C++17 by @MasterJH5574 in #19805
- [Fix] Revert C++20-only lambda captures for C++17 build by @MasterJH5574 in #19808
Full Changelog: v0.25.0.rc0...v0.25.0.rc1
v0.25.0.rc0
What's Changed
- [release][Dont Squash] Update version to 0.24.0 and 0.25.0.dev on main branch by @ysh329 in #19446
- [Relax][Frontend] Add ParameterList and ParameterDict containers by @mshr-h in #19495
- [Relax][Frontend][TFLite] Add segment operator mappings by @Aharrypotter in #19491
- [BUGFIX][TIR] Skip bool-typed expressions in CSE by @tqchen in #19502
- [Relax][Frontend][TFLite] Add tests coverage for SPACE_TO_BATCH_ND and BATCH_TO_SPACE_ND by @rknastenka in #19499
- [BugFix][Relax] Fix scatter_elements and scatter_nd CUDA compilation by @as4230 in #19497
- [BugFix][Relax][ONNX] Resolve param Vars in Concat to handle mixed Shape/Tensor inputs by @swjng in #19498
- [Web] Add support for OPFS by @akaashrp in #19494
- [BugFix][Relax][Torch] Honor multi-axis dims in torch.flip converter by @swjng in #19511
- [BugFix][Relax][Torch] Honor
correctionin std/var converter by @swjng in #19512 - [BugFix][S-TIR] Wrap bare scalar bodies in DefaultGPUSchedule to avoid root-block crash by @swjng in #19514
- [Relax][TFLite] Add gather frontend expected IRModule tests by @weicheng-hsu in #19516
- [Relax][PyTorch] Fix segfault in from_exported_program when model uses index_put_ with tuple output by @cchung100m in #19488
- [Relax][Frontend][TFLite] Add Conv3D support by @weicheng-hsu in #19523
- [REFACTOR][IR] Remove dead AttrFunctor template by @tqchen in #19528
- [Relax][ONNX] Normalize negative indices before the take call for
Gatheroperator by @cchung100m in #19525 - [Relax][Frontend] Add TFLite Frontend Support for CONV_3D_TRANSPOSE by @weicheng-hsu in #19530
- [TIR] Add cooperative_tensor builtins and metal.cooperative_tensor storage scope by @oraluben in #19423
- [Relax][Frontend][TFLite] Add initial StableHLO builtin operator support by @Aharrypotter in #19536
- [Contrib] Fix CUDA contrib build after FFI/header cleanups by @MasterJH5574 in #19539
- [BugFix][Relax]: handle ONNX ScatterElements reduction by @THINKER-ONLY in #19527
- [Fix][Relax]: ONNX Clip NaN bounds and preserve input NaN (ORT parity) by @ConvolutedDog in #19535
- [Fix][CI]: remove astral-sh/setup-uv from lint workflow by @ConvolutedDog in #19554
- [Relax][ONNX] Set
max_output_boxes_per_classdefault value to 0 for NonMaxSuppression by @cchung100m in #19547 - [Relax][ONNX] Add ONNX Backend Tests for systematic frontend coverage by @Aharrypotter in #19515
- [Fix][Relax] Lower bool prod as logical all by @ConvolutedDog in #19557
- [Relax][ONNX] Prevent
Divdivide-by-zero crashes by @cchung100m in #19566 - [TIRx] Bringup TIRx Infrastructure by @spectrometerHBH in #19581
- [BugFix][Target][LLVM] Use libm for asin/acos instead of buggy inline Taylor by @swjng in #19567
- [RFC][CodeGen][CUDA]: Gate fast math intrinsic lowering behind target option by @ConvolutedDog in #19565
- [TVMScript] Handle undefined functions when dumping IRModule by @ConvolutedDog in #19583
- [BugFix][Target][LLVM] Route sinh/cosh/atan/asinh/erf through libm extern by @swjng in #19568
- [Relax][ONNX] Fix TopK scalar K extraction in from_onnx by @javierdejesusda in #19573
- [Relax][Frontend][TFLite] Support StableHLO region-based ops and multi-subgraph models by @Aharrypotter in #19587
- [ONNX] Add RMSNormalization converter for ONNX opset 23 by @q55180514 in #19590
- [BUILD] Modularize device runtime into per-backend DSOs by @tqchen in #19594
- [Relax] Normalize negative concat axis in ReorderPermuteDimsAfterConcat by @cchung100m in #19588
- [RPC][Tracker] Bound msg_size to MAX_TRACKER_MSG_BYTES to prevent unbounded buffer growth by @bl4cksku11 in #19586
- [CodeGen][CUDA] Move fast math intrinsic lowering option to PassContext by @tlopex in #19596
- [IR] Add annotations to Call nodes by @tlopex in #19597
- [REFACTOR][RELAX] Fold CalleeCollector into relax DeadCodeElimination by @tqchen in #19603
- [Relax][Frontend][TFLite] Support quantized TFLite import via QDQ decomposition by @Aharrypotter in #19538
- Fix PytestUnknownMarkWarning: Unknown pytest.mark.adreno_clml by @cchung100m in #19602
- [REFACTOR][IR] Cleanup attrs.h: drop NullValue, AttrsNodeReflAdapter, legacy BaseAttrsNode methods by @tqchen in #19607
- [Docs] Reorganize development guide content by @tlopex in #19606
- [REFACTOR] Move src/ir/script_printer.cc to src/script/printer/ by @tqchen in #19611
- [REFACTOR][IR] Phase out src/ir/structural_{hash,equal}.cc to tvm-ffi by @tqchen in #19613
- [REFACTOR][IR] Inline ApplyPassToFunction into relax decompose_ops, delete the util by @tqchen in #19612
- [REFACTOR][TIR][ARITH] Phase out ControlFlowGraph, NarrowPredicateExpression, and rename Simplify to StmtSimplify by @tqchen in #19604
- [REFACTOR][IR] Phase out class Integer and class Bool in Attrs and PassConfig by @tqchen in #19614
- [CMAKE][RUNTIME] Link tvm_rpc with all backend runtime libraries by @cbalint13 in #19617
- [REFACTOR][IR] attrs.h follow-up cleanup: drop legacy vtable / rename / phase out AttrFieldInfo by @tqchen in #19615
- [REFACTOR][TIR] Tie AnnotateDeviceRegions/SplitHostDevice/LowerDeviceKernelLaunch together by @tqchen in #19605
- [Relax][Frontend][TFLite] Support control-flow multi-subgraph operators by @Aharrypotter in #19616
- [Relax][Frontend][TFLite] Add UNIDIRECTIONAL_SEQUENCE_RNN converter by @LudovicoYIN in #19601
- [IR] Rename Call annotations to attrs by @tlopex in #19618
- [REFACTOR][RUNTIME] Phase out tvm::runtime::regex_match by @tqchen in #19620
- [REFACTOR][RUNTIME] Remove leftover microTVM/CRT crumbs by @tqchen in #19622
- [REFACTOR][RUNTIME] Relocate nvtx.h to tvm/support/cuda and make it header-only by @tqchen in #19621
- [REFACTOR][PYTHON] Lift compiler/CLI/process modules from tvm.contrib to tvm.support by @tqchen in #19624
- [REFACTOR][IR][FFI] Bump tvm-ffi (+ SEqHashDef migration) and phase out tvm/ir/repr.h by @tqchen in #19627
- [REFACTOR][IR] Inline ReplaceGlobalVars into AttachGlobalSymbol by @tqchen in #19625
- [BugFix][Vulkan][CodeGen] Change OpControlBarrier to AcquireRelease by @kistenklaus in #19619
- [REFACTOR][RUNTIME] Structural reorganization: locality moves for thread_map, texture, minrpc, disco, contrib by @tqchen in #19628
- [REFACTOR][PYTHON] Consolidate derived_object into tvm.ir.utils by @tqchen in #19630
- [CI] Remove tvm-lint from tvm-bot by @yongwww in #19629
- [REFACTOR][SCRIPT] tvmscript streamline: lift printer.h, restore one-way dep, migrate dialect config to extra_config by @tqchen in #19631
- [REFACTOR][ARITH] Phase out arith/scalable_expression; arith no longer proves over scalable vectors by @tqchen in #19638
- [Relax][Frontend][TFLite] Add REDUCE_WINDOW support by @THINKER-ONLY in #19637
- [Relax][Frontend][TFLite] Add RNN converter by @LudovicoYIN in #19632
- [REFACTOR][IR] Delete class Bool and class Integer boxed-type wrappers by @tqchen in #19636
- [Relax][Frontend][TFLite] Add LSTM and SVDF converter by @LudovicoYIN in #19633
- [Relax][Frontend][TFLite] Add TFLite Resource Variable and Static Hashtable Import Support by @Aharrypotter in #19639
- [TIRx] Fix stale Simplify import in lowering test by @tlopex in #19642
- [Relax][Frontend][TFLite] Support sequence LSTM and RNN operators by @LudovicoYIN in #19634
- [Relax][Frontend][TFLite] Support STABLEHLO_WHILE by @Aharrypotter in #19646
- [Fix] Stabilize layer_norm variance computation with two-pass reduction by @ConvolutedDog in #19643
...
Apache TVM v0.24.0
Introduction
The TVM community has worked since the last release to deliver the following new exciting improvements!
The main tags are below (bold text is with lots of progress): Relax etc.
Please visit the full listing of commits for a complete view: v0.24.dev0...v0.24.0.rc0.
Community
None.
RFCs
None.
Adreno
- #18867 - Revive and consolicate Adreno features
Arith
- #19417 - Expose allow_override parameter in Python Analyzer.bind()
BugFix
- #19432 - [Fix][CUDA] Version compatibility of CUDA symbols
- #19427 - [FIX] Skip metal target tag registration for unsupported LLVM CPUs
- #19390 - [LLVM] Fix
insertDeclareAPI mismatch for ROCm-bundled LLVM 20 - #19410 - [Fix][Runtime][RPC] Fix remote tensor handle cleanup for RPC return values
- #19385 - [MetaSchedule] Fix
compile_relaxto applyMetaScheduleApplyDatabaseafterFuseOps - #19383 - [TIRx] Fix bad-optional-access in BF16/FP8 legalize passes for target-less PrimFuncs
- #19382 - [TIRx] Fix VerifyMemory crash for PrimFuncs without target attribute
- #19380 - [TOPI] Fix get_const_tuple hanging indefinitely when passed a te.Tensor
- #19368 - Align
tir.roundto ties-to-even across all backends - #19367 - [ONNX] Fix Round op to use ties-to-even
- #19362 - [TVMScript] Fix invalid f-string format spec causing TypeError on Python 3.14
- #19352 - [TVMScript] Add
doc.keywordhandling forExprEvaluator._visit - #18957 - [FIX] Inline ceil_log2 in gpu_2d_continuous_cumsum to fix MakePackedAPI error
- #18940 - [Fix] Fix tvm.tir references in Tflite frontend
- #18887 - [FIX] Fix cumsum kernel sblock_alloc_buffer for non-sblock buffer
- #18881 - [FIX][Adreno] Replace AllocBuffer with Bind in texture alloc injection
- #18838 - [TOPI] Fix resize accuracy issue with non-floor rounding
- #18782 - [S-TIR][FIX] Remove redundant std::move() to itself
- #18742 - [Fix] Handle empty variable name in NameSupply::FreshName
- #18694 - [TIR] Fix incorrect optimization when lowering floordiv and f…
- #18695 - [FIX] Fix T.sblock due to concurrent merge
CI
- #19445 - [REFACTOR] Decouple data.py from Jenkins script and docker images
- #18827 - Update images to
20260301-134651-63f099ad - #18863 - [S-TIR][Test] Mark meta_schedule tuning tests as skip
- #18851 - Remove stale test scripts (i386, hexagon, mypy)
- #18850 - [TEST] Remove stale URL mappings from request_hook
- #18848 - Remove legacy lint scripts and Apache RAT
- #18817 - [REFACTOR]Further cleanup docker images
- #18812 - [REFACTOR]Modernize Python dependency management with uv
- #18809 - Add GitHub Actions lint workflow
- #18805 - [REFACTOR][TEST] Migrate tir-transform tests from TE to TVMScript
- #18804 - [REFACTOR][TEST] Remove unused te imports from test files
- #18800 - Update images to
20260219-160550-72f51851 - #18796 - Refactor Dockerfiles and installation scripts
- #18775 - Update images to
20260214-152058-2a448ce4 - #18783 - Update system cuda version 12.4->12.8
- #18780 - Remove unity from tvm-bot
- #18777 - Update Pillow, pytest-rerunfailures, junitparser, xgboost, onnx and pytorch
- #18647 - Upgrade Python to 3.10 in CI
- #18749 - Remove i386 and Hexagon from CI pipeline (2)
- #18757 - Further cleanup CI after merging unity to main test
- #18456 - Move conda config files to tests/conda and remove unused conda build infrastructure
- #18755 - [TEST] Cleanup legacy tests and migrate unity tests to main one
- #18737 - Remove i386 and Hexagon from CI pipeline (1)
- #18748 - Remove i386 and hexagon from
.asf.yaml - #18719 - [REFACTOR][TEST] Migrate all codegen test to tvmscript
- #18717 - Fix double newlines in nightly docker update
- #18711 - [REFACTOR][TEST] Replace CompareBeforeAfter for pytest compact
- #18692 - Fix NameError in nightly docker update workflow
Docker
- #18854 - Refactor bash.sh: auto-detect rootless, add --shell, TVM_DEV_MOUNTS
- #18710 - [ci]Nightly Docker image update
Docs
- #19439 - Refactor BYOC example NPU tutorial
- #19414 - Fix stale tvm.tirx exclude list and add missing legalize_ops.unary entry
- #19409 - Fix outdated source install and API reference docs
- #19407 - Fix #18714: python -c "import tvm; print(tvm.file)" fail
- #19396 - Add code generation architecture documentation
- #19398 - Add TVMScript architecture documentation
- #19397 - Add PyModule tutorial to How-To toctree
- #19399 - Clean up architecture docs: remove duplicates, fix stale content
- #19389 - Add Relax VM architecture documentation
- #19394 - Add operator fusion architecture documentation
- #19395 - Add BYOC external library dispatch architecture documentation
- #19387 - Add docstrings for nn.Module classes and core APIs in relax.frontend.nn
- #19386 - Add tvm.s_tir.tensor_intrin API reference and remove empty legacy tvm/tir directory
- #19379 - Add API reference for tvm.arith, tvm.testing, tvm.exec, tvm.tirx.backend and extend topi/contrib/ir/target docs
- #19369 - Add API reference for tvm.s_tir submodules: dlight, meta_schedule, backend
- #19366 - Add API reference documentation for tvm.script module
- #19356 - Add DLight and MetaSchedule deep-dive instructions
- #19364 - TFLite tests requiring Python 3.10 and specific package versions to avoid core dumps
- #19354 - Add tutorial for importing models from PyTorch, ONNX, and TFLite
- #19358 - Add Dataflow Pattern Language (DPL) documentation for Relax
- #19357 - Add Disco distributed runtime architecture overview
- #19351 - Fix outdated paths, links, and add missing API references across documentation(3)
- #19353 - Add tvm.s_tir.analysis API reference page
- #19350 - Add Relax VM architecture overview in documentation
- #19344 - Fix outdated code examples, typos, and missing API reference in documentation(2)
- #18965 - Fix outdated code examples, types, and missing references across documentation
- #18966 - [DOC] Fix various issues
- #18953 - Align documentation with tirx/s_tir namespace split
- #18947 - Add tutorial for mixing Python/PyTorch with TVM using BasePyModule
- #18939 - [DOC] Fix inconsistent code comments
- [#18941](#1894...