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bench agent builds a job's bitstream before its approval, so the approved run only loads and reads (Closes #8792) - #8797
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…oved run only loads and reads (Closes #8792) Hot reload H7 of #8737. specs/verified/bench_agent.t27 job_prebuild() lets `t27c bench-agent` build a job the owner opened, but has not approved yet, with `t27c silicon --skip-hardware`. That returns before the hardware section, so the cable is not touched, and stores the bitstream in the reuse cache, whose key holds only build inputs (no nonce, no board). After `/bench approve` the run reads REUSE and spends its time on the board alone, instead of 30 s (ternary_link) to 400-550 s (gft_signed_mac) of yosys and nextpnr first. Only the owner's jobs, never one asking for non-volatile memory, never twice, nothing while paused, and one per poll after the approved runs. "Twice" is keyed on the job's build fields, not its text: the Queen rewrote #8794's body between two polls, and a body-keyed marker built it again. Tested on #8794 (ternary_link, seed 11, not approved): pass 1 prebuilt it, pass 2 skipped it, no openFPGALoader process ran, and `t27c silicon ... --skip-hardware` then read "bitstream REUSED". Spec 7/7 tests, 0 vacuous. Paid for by deleting scripts/gen_w328.py, a one-shot wave-328 generator. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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enabled auto-merge (squash)
October 10, 2026 20:49
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Hot reload H7 of #8737, epic #8095.
What
specs/verified/bench_agent.t27gainsjob_prebuild()andPREBUILDS_PER_POLL.t27c bench-agentbuilds a job the owner opened, but has not yet approved, witht27c silicon --skip-hardware.bitstream_reuse.t27), whose key holds only build inputs: Verilog, XDC, tools, seed, recipe. There is no nonce and no board in it./bench approve, the run reads REUSE and spends its time on the board alone.run_bench_agent. The budget is paid for by deletingscripts/gen_w328.py, a one-shot wave-328 generator that only an old plan file mentions.bench_agent.rsis regenerated. It also gainsREUSE, which comes from the import closure; the committed file was stale.Tested
On #8794 (ternary_link, seed 11, open, not approved):
t27c bench-agent --once, pass 1#8794: refuse, thenprebuilt specs/fpga/ternary_link.t27 for its approval (no cable touched): exit Some(0)#8794: refuseonly; the marker holds (2 s)t27c silicon specs/fpga/ternary_link.t27 --top fpga/verilog/ternary_link_jtag.v --skip-hardware --pnr-seed 11bitstream REUSED, 7 sopenFPGALoaderprocess at any point during the three stepst27c test-report specs/verified/bench_agent.t27Local gates: gitleaks clean, only-t27 gate 0, foreign-line budget 0,
tri seals driftclean.Not done
#8794 runs on the board only after the owner's
/bench approve. Agents on this account never post that word.🤖 Generated with Claude Code