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Improve our WarpReduce implementation - #6814

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bernhardmgruber merged 6 commits into
NVIDIA:mainfrom
miscco:warp_reduce_improvements
Dec 1, 2025
Merged

bernhardmgruber merged 6 commits into
NVIDIA:mainfrom
miscco:warp_reduce_improvements

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@miscco

@miscco miscco commented Nov 30, 2025

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For the warpspeed scan PR we need a common implementation of __reduce_or_sync

I wanted to add a specialization for that to WarpReduce and found some ... historical artifacts.

This cleanes those up and centralizes the optimizations into a single place. Finally it adds the specializations for __reduce_and_sync and __reduce_or_sync

There is no standard functor for logical_xor though :(

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miscco requested a review from a team as a code owner November 30, 2025 09:34
@miscco
miscco requested a review from gevtushenko November 30, 2025 09:34
@github-project-automation github-project-automation Bot moved this to Todo in CCCL Nov 30, 2025
@cccl-authenticator-app cccl-authenticator-app Bot moved this from Todo to In Review in CCCL Nov 30, 2025
@miscco

miscco commented Nov 30, 2025

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Note to reviewers, its simplest to go by commit

Comment on lines +75 to +77
template <class T>
inline constexpr bool reduce_max_exists<T, ::cuda::maximum<T>, decltype(__reduce_max_sync(0xFFFFFFFF, T{}))> =
(::cuda::std::is_same_v<int, T> || ::cuda::std::is_same_v<unsigned int, T>);

@miscco miscco Nov 30, 2025 •

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Note to self:

I believe we can relax that constrain to is_integral<T> && sizeof(T) <= sizeof(int) and then in the optimization pass below cast to using promoted_t = ::cuda::std::conditional_t<::cuda::std::is_signed_v<T>, int, unsigned>;

Then casting back to the original T should be fine. That said, I believe this to be a rather invasiev change so I leave that for a followup

_CCCL_DEVICE _CCCL_FORCEINLINE _Tp ReduceStep(
_Tp input, ReductionOp reduction_op, int last_lane, int offset, ::cuda::std::true_type /*is_small_unsigned*/)
{
return ReduceStep(input, reduction_op, last_lane, offset);

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"Dispatch to specialized implementations"

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🤣

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@oleksandr-pavlyk

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@miscco
miscco force-pushed the warp_reduce_improvements branch from 1146770 to e620a4a Compare November 30, 2025 18:08
@miscco

miscco commented Nov 30, 2025

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Per https://docs.nvidia.com/cuda/cuda-c-programming-guide/#warp-reduce-synopsis __reduce_xor_sync is there.

That is true, but we do not have a function object that does logical XOR in the library

* Up-offset to pull from
*/
_CCCL_DEVICE _CCCL_FORCEINLINE double
ReduceStep(double input, ::cuda::std::plus<> /*reduction_op*/, int last_lane, int offset)

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Note to reviewer, I believe we can also considerably clean those up, but that would make the PR quite unwieldly

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@oleksandr-pavlyk

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Per https://docs.nvidia.com/cuda/cuda-c-programming-guide/#warp-reduce-synopsis __reduce_xor_sync is there.

That is true, but we do not have a function object that does logical XOR in the library

I think we should map cuda::std::bit_xor for unsigned integral types to __reduce_xor_sync.

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This LGTM, but we absolutely must have a SASS diff of a fitting test/benchmark before/after SM80 to verify this. I can take that.

@bernhardmgruber

bernhardmgruber commented Dec 1, 2025 •

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Unfortunately, this is creating a lot more instructions on SM90 (and 100) for test cub.test.block.reduce.dimx_32.dimyz_1 (compiled for 75,90,100)

For example:
image
We previously generated a REDUX.MAX.S32 and now have a lot of shuffles.

This also affects REDUX.SUM.S32 and CREDUX.MAX.S32

@miscco
miscco force-pushed the warp_reduce_improvements branch from 4167ad8 to 9479fc0 Compare December 1, 2025 09:42
@miscco

miscco commented Dec 1, 2025

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Thanks @bernhardmgruber for checking, I found that I missed a void_t in the move to inline variables. With that I cannot find any SASS changes in the test

@miscco miscco mentioned this pull request Dec 1, 2025
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_CCCL_DEVICE _CCCL_FORCEINLINE T Reduce(T input, int valid_items, ReductionOp reduction_op)
{
return ReduceImpl(bool_constant_v<ALL_LANES_VALID>, input, valid_items, reduction_op);
if constexpr (ALL_LANES_VALID)

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Question: Why do we only do the __reduce_meow_sync optimization when having a full lane, it explicitly takes the valid lanes as arguments?

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the __reduce_op_sync aggregation has been made in a similar way in #4312. I will need to update this PR to align with this change

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🥳 CI Workflow Results

🟩 Finished in 10h 16m: Pass: 100%/93 | Total: 5d 05h | Max: 5h 26m | Hits: 63%/96454

See results here.

@bernhardmgruber
bernhardmgruber merged commit bbe5cb7 into NVIDIA:main Dec 1, 2025
309 of 318 checks passed
@github-project-automation github-project-automation Bot moved this from In Review to Done in CCCL Dec 1, 2025
@miscco
miscco deleted the warp_reduce_improvements branch December 2, 2025 08:57
@fbusato fbusato mentioned this pull request Oct 13, 2026
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4 participants