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[#15793][perf] Optimize KV cache for unified memory systems (DGX Spark) - #12301

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@mihai-chiorean

@mihai-chiorean mihai-chiorean commented Mar 18, 2026 •

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Summary

Fixes #15793

On unified-memory systems like DGX Spark / GB10, CPU and GPU share the same physical LPDDR memory pool. The current KV cache sizing path can still treat GPU memory and host memory as separate tiers when host_cache_size is nonzero, but there is no separate host DRAM tier to offload to on these systems. cudaMemGetInfo already reports the unified pool, so the secondary host-cache budget should be folded away instead of tracked as a separate pool.

This patch adds integrated-device detection and folds the host KV cache tier on unified-memory systems:

  1. Detect true unified-memory devices: Add isUnifiedMemorySystem() in C++ using cudaDevAttrIntegrated. This intentionally does not use cudaDevAttrPageableMemoryAccess, which can also be true on HMM-enabled discrete GPUs.

  2. Fold Python host_cache_size defaults: Add unified_memory_detected to KvCacheConfig, auto-detect via is_device_integrated(), and force host_cache_size to 0 when unified memory is detected.

  3. Defensive C++ budget guard: In calculateFreeMemBytes(), force freeSecondaryMemBytes = 0 on unified-memory systems if C++ executor users bypass the Python validator and still provide a nonzero host_cache_size.

All changes are gated on integrated-device detection and preserve existing behavior on discrete GPU systems.

Test Coverage

  • Verified is_device_integrated() returns true on DGX Spark GB10 / SM121 with about 121.7 GB visible memory.
  • Verified KvCacheConfig auto-detects the unified-memory device path.
  • Pre-commit checks pass.
  • Existing KV cache manager unit tests require LLM_MODELS_ROOT and full model data, so they are deferred to NVIDIA CI.

Test plan

  • Verify integrated-device detection on DGX Spark / GB10 / SM121.
  • Verify KvCacheConfig auto-detects the unified-memory device path.
  • Pre-commit checks pass (clang-format, codespell, DCO).
  • Build and run existing KV cache manager unit tests on discrete GPU — deferred to NVIDIA CI because model data is not available locally.
  • Run inference workload on DGX Spark — deferred to NVIDIA CI because full model weights are not available locally.

PR Checklist

Please review the following before submitting your PR:

  • PR description clearly explains what and why. If using CodeRabbit's summary, please make sure it makes sense.

  • PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.

  • Test cases are provided for new code paths (see test instructions)

  • Any new dependencies have been scanned for license and vulnerabilities

  • CODEOWNERS updated if ownership changes

  • Documentation updated as needed

  • Update tava architecture diagram if there is a significant design change in PR.

  • The reviewers assigned automatically/manually are appropriate for the PR.

  • Please check this after reviewing the above items as appropriate for this PR.

Dev Engineer Review

  • Added common::isUnifiedMemorySystem() with cudaDevAttrIntegrated.
  • Unified-memory systems now set host_cache_size to zero.
  • C++ safeguards prevent secondary KV-cache accounting when Python validation is bypassed.
  • Discrete GPU behavior remains unchanged.
  • No configuration or test-list files were modified.

QA Engineer Review

  • Modified test_KvCacheConfig_declaration.
  • Added:
    • test_kv_cache_config_unified_memory_forces_host_cache_size_zero
    • test_kv_cache_config_discrete_memory_preserves_host_cache_size
    • test_kv_cache_config_preserves_host_cache_size_when_detection_fails
  • No corresponding entries were found in tests/integration/test_lists/.
  • Verdict: needs follow-up.

@mihai-chiorean
mihai-chiorean requested review from a team as code owners March 18, 2026 03:15
@mihai-chiorean
mihai-chiorean requested a review from hchings March 18, 2026 03:15
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📒 Files selected for processing (4)
  • cpp/include/tensorrt_llm/common/cudaUtils.h
  • cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp
  • tensorrt_llm/llmapi/llm_args.py
  • tests/unittest/llmapi/test_llm_args.py
🚧 Files skipped from review as they are similar to previous changes (4)
  • tensorrt_llm/llmapi/llm_args.py
  • tests/unittest/llmapi/test_llm_args.py
  • cpp/include/tensorrt_llm/common/cudaUtils.h
  • cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp

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Walkthrough

The changes detect integrated CUDA devices and prevent a separate host KV cache budget on unified-memory systems. Python configuration and C++ memory accounting set the host or secondary cache budget to zero when the device is integrated.

Changes

Unified memory KV cache handling

Layer / File(s) Summary
Unified-memory detection and configuration
cpp/include/tensorrt_llm/common/cudaUtils.h, tensorrt_llm/llmapi/llm_args.py, tests/unittest/llmapi/test_llm_args.py
Adds isUnifiedMemorySystem() using cudaDevAttrIntegrated. KvCacheConfig sets host_cache_size to zero on integrated devices. Tests cover integrated devices, discrete devices, and detection failures. The header copyright range changes to 2022–2026.
C++ secondary-memory accounting
cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp
Sets secondary free-memory bytes to zero on unified-memory systems. Discrete systems retain the configured host-cache budget.

Estimated code review effort: 3 (Moderate) | ~25 minutes

Merge Risk: ⚪ Minimal · up to 00be0

This change folds the secondary KV-cache budget into the unified memory pool only on integrated-memory systems while preserving discrete-GPU behavior; no actionable merge-blocking risk remains beyond normal checks and review.

Sequence Diagram(s)

sequenceDiagram
    participant KvCacheConfig
    participant CUDA as CUDA runtime
    participant KVCacheManager
    participant Tests

    KvCacheConfig->>CUDA: Query integrated-device status
    CUDA-->>KvCacheConfig: Return unified-memory status
    KvCacheConfig->>KvCacheConfig: Set host_cache_size to zero
    KVCacheManager->>CUDA: Query integrated-device status
    CUDA-->>KVCacheManager: Return unified-memory status
    KVCacheManager->>KVCacheManager: Set secondary free-memory bytes to zero
    Tests->>KvCacheConfig: Validate integrated, discrete, and failure cases
Loading

Suggested reviewers: asfiyab-nvidia, junyixu-nv

🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name Status Explanation Resolution
Docstring Coverage ⚠️ Warning Docstring coverage is 18.75% which is insufficient. The required threshold is 80.00%. Docstring coverage is scoped to functions touched by this diff. Analyzed 16 functions across 4 files. Write docstrings for the functions missing them to satisfy the coverage threshold.
✅ Passed checks (4 passed)
Check name Status Explanation
Title check ✅ Passed The title clearly identifies issue #15793, classifies the change as performance work, and summarizes the unified-memory KV-cache optimization.
Description check ✅ Passed The description explains the issue, solution, affected systems, test coverage, deferred validation, and checklist status. It provides sufficient context for review.
Linked Issues check ✅ Passed The changes satisfy issue #15793 by detecting integrated GPUs with cudaDevAttrIntegrated, forcing host_cache_size to zero, guarding C++ memory accounting, and preserving discrete-GPU behavior.
Out of Scope Changes check ✅ Passed All code and test changes support the unified-memory KV-cache objective. The copyright year update is limited to a modified header and does not introduce unrelated functional scope.
  • Fix all pre-merge checks with AI
✨ Finishing Touches 💡 1
🛠️ Fix failing CI checks 💡
  • Create stacked PR
  • Commit on current branch
🧪 Generate unit tests (beta)
  • Create PR with unit tests

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Actionable comments posted: 2

🤖 Prompt for all review comments with AI agents
Verify each finding against the current code and only fix it if needed.

Inline comments:
In `@cpp/include/tensorrt_llm/common/cudaUtils.h`:
- Around line 320-331: The function isUnifiedMemorySystem caches a single global
result in sIsUnified but queries the current device (cudaGetDevice), so if the
active CUDA device changes later the cached value can be stale; update
isUnifiedMemorySystem to either query the device attributes on every call
(remove the static sIsUnified lambda) or maintain a per-device cache keyed by
the device id (call cudaGetDevice, then consult/populate a map< int, bool >
using cudaDeviceGetAttribute and check_cuda_error) so the returned
pageable-memory flag correctly reflects the current device.

In `@tensorrt_llm/llmapi/llm_args.py`:
- Around line 2205-2208: The try/except around the call to
is_device_integrated() should stop catching broad Exception; replace the broad
catch with a specific catch for RuntimeError so CUDA-related failures are
handled while other exceptions propagate. Locate the block where unified =
is_device_integrated() is called and change the except Exception to except
RuntimeError, leaving unified=False on that branch and not swallowing other
errors.

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Reviewing files that changed from the base of the PR and between 2f94dda and 90c4c1d.

📒 Files selected for processing (3)
  • cpp/include/tensorrt_llm/common/cudaUtils.h
  • cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp
  • tensorrt_llm/llmapi/llm_args.py

Comment thread tensorrt_llm/llmapi/llm_args.py Resolved
@svc-trtllm-gh-bot svc-trtllm-gh-bot added the Community want to contribute PRs initiated from Community label Mar 18, 2026
@nvpohanh

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@eopXD could you review this? thanks

@pengbowang-nv

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I wonder why we need a secondary pool at all on DGX Spark. Also do you have any test result or evidence on memory usage reduction? Thanks!

@mihai-chiorean

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@pengbowang-nv We don't need a secondary pool on DGX Spark — hence freeSecondaryMemBytes = 0. On unified memory, the offload/onboard memcpy copies data to the same physical address since CPU and GPU share the same LPDDR5x pool.

Tested on DGX Spark GB10 (SM121, 128GB unified memory):

[TRT-LLM] [I] Unified memory detected: host_cache_size (1073741824 bytes) will be folded
           into primary GPU pool by the C++ runtime.

is_device_integrated() returns True, the validator detects unified memory, and host_cache_size is folded into the primary pool. The C++ runtime then sets freeSecondaryMemBytes = 0, so blocksInSecondaryPool = 0 — no secondary pool is allocated. The memcpy skips in the offload/onboard paths are defensive for the edge case where a user explicitly forces host_cache_size.

Rebased on latest main, no conflicts.

@pengbowang-nv

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I think we shouldn't allow a secondary pool with non-zero size on DGX Spark, it meaningless since we want secondary pool to hold what first pool cannot hold.
I think we should set self.host_cache_size to zero forcefully on DGX Spark like devices. @eopXD and @nvpohanh
for comment. Though for now we already have self.host_cache_size default to 0 so this might have less impact. Thanks!

@mihai-chiorean
mihai-chiorean force-pushed the feat/unified-memory-kv-cache-offload branch from c86f04c to 91dd9a5 Compare March 25, 2026 23:28
@mihai-chiorean

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@pengbowang-nv Good point — updated. host_cache_size is now forced to 0 on unified memory systems instead of just logging. The Python validator calls object.__setattr__(self, 'host_cache_size', 0) when is_device_integrated() returns True, which is consistent with the C++ side already setting freeSecondaryMemBytes = 0.

@mihai-chiorean

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@pengbowang-nv what do you think? I've addressed your feedback.

@pengbowang-nv

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Thanks! I'm thinking of complete remove these code guarding operation under unified memory situation, which means we assume that we won't be using secondary pool on unified memory at all. So just guard on python side would be enough. I'm also waiting for @eopXD to give some advice as I'm not sure of impact of such change.

@mihai-chiorean

mihai-chiorean commented Apr 1, 2026 •

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Thanks! I'm thinking of complete remove these code guarding operation under unified memory situation, which means we assume that we won't be using secondary pool on unified memory at all. So just guard on python side would be enough. I'm also waiting for @eopXD to give some advice as I'm not sure of impact of such change.

yeaa that's a fair call.happy to give that a try if that's the preference.

@mihai-chiorean

mihai-chiorean commented Apr 1, 2026 •

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@pengbowang-nv I simplified it. C++ footprint goes from 5 guard sites to 1. Python-side host_cache_size=0 enforcement stays as the primary path.

@mihai-chiorean

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I was out for a few days. @eopXD any chance you can take a look at this? would be very helpful. Or is @nvpohanh the better person for this?

@mihai-chiorean
mihai-chiorean force-pushed the feat/unified-memory-kv-cache-offload branch from 0e3f2b0 to 89babd4 Compare May 6, 2026 04:07
@nvpohanh

nvpohanh commented May 8, 2026

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@eopXD Could you review this? Thanks

@mihai-chiorean

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@eopXD any chance you could take a look? or @hchings ?

@mihai-chiorean

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@hchings — friendly bump. This is a small, scoped change for unified-memory systems (DGX Spark / SM121):

  • cpp/include/tensorrt_llm/common/cudaUtils.h (+18): isUnifiedMemorySystem() using cudaDevAttrIntegrated
  • cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp (+18): single guard at calculateFreeMemBytes setting freeSecondaryMemBytes = 0 on UMA
  • tensorrt_llm/llmapi/llm_args.py (+38): unified_memory_detected field + validator forcing host_cache_size = 0

@nvpohanh originally suggested @eopXD might be a good reviewer here. If neither of you is the right person, please feel free to redirect to the kv-cache-manager-devs group — I can't add team reviewers as an external contributor.

@mihai-chiorean
mihai-chiorean force-pushed the feat/unified-memory-kv-cache-offload branch from b370d78 to 893d3f4 Compare June 25, 2026 22:29
@mihai-chiorean

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@hchings @pengbowang-nv @nvpohanh can I get a CI run..? this seems good to go

@moraxu

moraxu commented Jun 30, 2026

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/bot run

@mihai-chiorean mihai-chiorean changed the title [None][perf] Optimize KV cache for unified memory systems (DGX Spark) [#15793][perf] Optimize KV cache for unified memory systems (DGX Spark) Jun 30, 2026
Comment thread tensorrt_llm/llmapi/llm_args.py Resolved
@mihai-chiorean
mihai-chiorean requested a review from a team as a code owner July 20, 2026 19:29
… Spark)

On Grace Blackwell systems (e.g. DGX Spark / GB10), CPU and GPU share
the same 128 GB LPDDR5x physical memory pool. The KV cache block
manager treats GPU and CPU as separate tiers, which forces a non-zero
host_cache_size to allocate a meaningless secondary pool and triggers
unnecessary memcpy for offload/onload that are physically no-ops.

Changes:

- Add isUnifiedMemorySystem() to cudaUtils.h, using cudaDevAttrIntegrated
  (not cudaDevAttrPageableMemoryAccess, which returns true on any
  HMM-enabled discrete GPU). Queries each call -- the attribute lookup
  is cheap and supports mixed-device processes.

- Add unified_memory_detected field to KvCacheConfig in Python, with
  auto-detection via is_device_integrated(). When True, host_cache_size
  is forced to 0 in the validator. This is the primary guard.

- Add a single defensive guard in calculateFreeMemBytes() that forces
  freeSecondaryMemBytes=0 on unified memory if host_cache_size is still
  non-zero (e.g. C++ executor API users bypassing the Python validator).

All changes are no-ops on discrete GPU systems.

Refs: NVIDIA#3130
Signed-off-by: Mihai Chiorean <mihai.v.chiorean@gmail.com>
Signed-off-by: Mihai Chiorean <mihai.v.chiorean@gmail.com>
Signed-off-by: Mihai Chiorean <mihai.v.chiorean@gmail.com>
Signed-off-by: Mihai Chiorean <mihai.v.chiorean@gmail.com>
@mihai-chiorean
mihai-chiorean force-pushed the feat/unified-memory-kv-cache-offload branch from cb863d9 to 38ab858 Compare August 6, 2026 18:39
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🧹 Nitpick comments (3)
tests/unittest/llmapi/test_llm_args.py (3)

938-943: 📐 Maintainability & Code Quality | 🔵 Trivial | ⚡ Quick win

Mark the integrated-memory test as CPU-only.

This test replaces is_device_integrated with a lambda and performs no CUDA operation. Add @pytest.mark.cpu_only, matching the discrete-memory test.

As per path instructions, review test changes as QA coverage.

🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In `@tests/unittest/llmapi/test_llm_args.py` around lines 938 - 943, Add the
`@pytest.mark.cpu_only` decorator to
test_KvCacheConfig_unified_memory_forces_host_cache_size_zero, matching the
corresponding discrete-memory test while leaving its existing setup and
assertions unchanged.

Source: Path instructions


938-948: 📐 Maintainability & Code Quality | 🔵 Trivial | ⚡ Quick win

Rename the two added test functions to snake_case.

Rename them to:

  • test_kv_cache_config_unified_memory_forces_host_cache_size_zero
  • test_kv_cache_config_discrete_memory_preserves_host_cache_size

As per coding guidelines, use snake_case for files, functions, methods, locals, and mutable globals.

Proposed rename
-def test_KvCacheConfig_unified_memory_forces_host_cache_size_zero(monkeypatch):
+def test_kv_cache_config_unified_memory_forces_host_cache_size_zero(monkeypatch):

-def test_KvCacheConfig_discrete_memory_preserves_host_cache_size(monkeypatch):
+def test_kv_cache_config_discrete_memory_preserves_host_cache_size(monkeypatch):
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In `@tests/unittest/llmapi/test_llm_args.py` around lines 938 - 948, Rename the
two test functions KvCacheConfig tests to snake_case:
test_kv_cache_config_unified_memory_forces_host_cache_size_zero and
test_kv_cache_config_discrete_memory_preserves_host_cache_size. Keep their test
logic unchanged.

Source: Coding guidelines


684-686: 📐 Maintainability & Code Quality | 🔵 Trivial | 🏗️ Heavy lift

Add coverage for the fallback and C++ safeguard.

Modified: test_KvCacheConfig_declaration. Added: test_KvCacheConfig_unified_memory_forces_host_cache_size_zero and test_KvCacheConfig_discrete_memory_preserves_host_cache_size. The file is listed in l0_cpu.yml and l0_a10.yml. Add coverage for the RuntimeError fallback and C++ unified-memory bypass. Run pytest tests/unittest/.

Test coverage verdict: needs follow-up.

🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In `@tests/unittest/llmapi/test_llm_args.py` around lines 684 - 686, Extend the
KvCacheConfig tests around test_KvCacheConfig_declaration to cover the
RuntimeError fallback path and the C++ unified-memory safeguard, including the
expected host cache size behavior. Add focused cases for both scenarios and run
pytest tests/unittest/.

Sources: Coding guidelines, Path instructions

🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

Nitpick comments:
In `@tests/unittest/llmapi/test_llm_args.py`:
- Around line 938-943: Add the `@pytest.mark.cpu_only` decorator to
test_KvCacheConfig_unified_memory_forces_host_cache_size_zero, matching the
corresponding discrete-memory test while leaving its existing setup and
assertions unchanged.
- Around line 938-948: Rename the two test functions KvCacheConfig tests to
snake_case: test_kv_cache_config_unified_memory_forces_host_cache_size_zero and
test_kv_cache_config_discrete_memory_preserves_host_cache_size. Keep their test
logic unchanged.
- Around line 684-686: Extend the KvCacheConfig tests around
test_KvCacheConfig_declaration to cover the RuntimeError fallback path and the
C++ unified-memory safeguard, including the expected host cache size behavior.
Add focused cases for both scenarios and run pytest tests/unittest/.

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📥 Commits

Reviewing files that changed from the base of the PR and between f12c5e5 and 38ab858.

📒 Files selected for processing (4)
  • cpp/include/tensorrt_llm/common/cudaUtils.h
  • cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp
  • tensorrt_llm/llmapi/llm_args.py
  • tests/unittest/llmapi/test_llm_args.py
🚧 Files skipped from review as they are similar to previous changes (1)
  • cpp/include/tensorrt_llm/common/cudaUtils.h

Signed-off-by: Mihai Chiorean <mihai.v.chiorean@gmail.com>
@mihai-chiorean

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Addressed the test nits in 9dc2b85580: both tests are CPU-only and snake_case, and coverage now verifies the RuntimeError detection fallback preserves host_cache_size. The C++ safeguard remains covered by Spark integration; adding a CUDA-attribute mock seam here would broaden this focused change.

@Infatoshi Infatoshi mentioned this pull request Aug 23, 2026

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Stamp on behalf of runtime devs, @NVIDIA/trt-llm-kv-cache-manager-devs to give final approval

@mikeiovine
mikeiovine requested review from a team, SimengLiu-nv and liji-nv August 26, 2026 23:16
…0260806

Signed-off-by: Mihai Chiorean <mihai.v.chiorean@gmail.com>

# Conflicts:
#	tests/unittest/llmapi/test_llm_args.py
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Rebased onto current main in 00be09f. The only conflict was in test_llm_args.py; I preserved upstream’s new KV-manager tests and this PR’s unified-memory monkeypatch coverage. Validation: scoped pre-commit passed, and 15 focused KvCacheConfig tests passed on Spark SM121 against the current ARM64 release image. The refreshed API-label check now requires api-compatible because llm_args.py is in the protected path; this changes no public field or signature, and I cannot apply repository labels as an external contributor. @mikeiovine, could you please add api-compatible and re-stamp the main-only merge when convenient?

@mihai-chiorean

mihai-chiorean commented Sep 1, 2026 •

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Current head 00be09f78e is mergeable, scoped pre-commit and focused KV-cache tests pass, and there are no unresolved conversations. The only visible failure is the LLM API compatibility policy check because llm_args.py is protected; this change does not alter a public field or signature. @mikeiovine, could you add the api-compatible label? @asfiyab-nvidia @JunyiXu-nv, could one of you provide the remaining code-owner review and trigger full CI once the label passes?

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Requesting changes: the C++ target was removed on main (#18538), and the validator now conflicts with #18926's integrated-aware V2 host tier. For the Spark sizing issue I'd go with #20951.

unified_memory_detected = False

if unified_memory_detected:
if self.host_cache_size and self.host_cache_size > 0:

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On current main this only catches an explicit value: host_cache_size=None still gets the V2 auto host tier, which #18926 made integrated-aware. So on Spark the default keeps a host tier while an explicit size gets none (MemFree 100 GiB, 60 GiB device quota: None gives 20 GiB, 4 GiB gives 0). Could the explicit case be handled next to #18926 in KVCacheManagerV2 (and V1's resource_manager.py sizing) instead of rewriting the config at parse time? The branch no longer merges either: #18538 removed calculateFreeMemBytes, so the C++ guard has nothing left to patch.


if unified_memory_detected:
if self.host_cache_size and self.host_cache_size > 0:
logger.info(

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This drops a value the user set explicitly, so logger.warning (as disable_periodic_mamba_snapshots_for_conversations does in this class) would make it visible.

@mihai-chiorean

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Thanks @JunyiXu-nv, agreed on both points. Closing this as superseded.

The remaining Spark sizing problem, reclaimable page cache not being counted as available memory, is what #20951 addresses, so I'll follow up there. One gap it doesn't cover: an explicit V2 host_cache_size larger than the shared memory left over still gets no warning on integrated GPUs. If that's useful, I'm happy to propose a warn-only check (keeping the user's value) once #20951 lands.

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[Bug]: Redundant KV host cache tier on DGX Spark unified-memory systems

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