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LLVM-reserved registers can't be used in inline assembly #85056

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LLVM-reserved registers can't be used in inline assembly#85056
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A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.A-inline-assemblyArea: Inline assembly (`asm!(…)`)F-asm`#![feature(asm)]` (not `llvm_asm`)T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.

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@jethrogb
jethrogb
opened on May 7, 2021

On several architectures, some registers are considered reserved by LLVM. These registers effectively can't be used by LLVM's inline assembly instruction as in input/output/clobber.

rustc currently disallows using these registers in asm!. This seems to be in contradiction with a stated goal in the RFC:

The intent is that support for asm! should be independent of the rustc back-end used

As such, I'd expect there to be no backend-specific limitations on inline assembly.

Current LLVM-reserved registers are:

  • x86: esi
  • x86-64: rbx
  • ARM: r7

Activity

  1. jethrogb commented on May 7, 2021

    @jethrogb
    jethrogb
    on May 7, 2021
    ContributorAuthor

    At this time, solutions other than “fixing LLVM” seem non-exhaustive or non-trivial. See additional discussion at https://rust-lang.zulipchat.com/#narrow/stream/216763-project-inline-asm/topic/Handling.20clobbers

  2. jonas-schievink
    added
    A-inline-assemblyArea: Inline assembly (`asm!(…)`)
    A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.
    F-asm`#![feature(asm)]` (not `llvm_asm`)
    on May 7, 2021

  3. bstrie commented on May 7, 2021

    @bstrie
    bstrie
    on May 7, 2021
    Contributor

    Un-reserving registers can be done backwards-compatibly, yes? Presumably this does not block stabilization of asm!.

  4. bors
    added a commit that references this issue on Jun 9, 2021

    Merge #336

    dbf2bdb

  5. Lokathor commented on Jun 24, 2022

    @Lokathor
    Lokathor
    on Jun 24, 2022
    Contributor

    It seems that r6 is also reserved by LLVM on ARM with both T32 and A32.

    r7 seems to now be available with A32 (but still not T32).

  6. sleffler
    added a commit that references this issue on Nov 29, 2022

    sel4-sys: fixup MCS-affected syscall wrappers for aarch32

    5cb62a9
  7. 0xor0ne
    added a commit that references this issue on Dec 26, 2022

    Fix r7 register usage in ARM syscall

    d5c38bd
  8. Noratrieb
    added
    T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.
    on Apr 5, 2023
  9. Willmish
    added a commit that references this issue on Feb 14, 2024

    sel4-sys: fixup MCS-affected syscall wrappers for aarch32

    fe4205d
  10. XuShaohua
    added a commit that references this issue on Feb 17, 2024

    linux-x86: Disable asm version on x86.

    ad2c4ee

  11. oxalica commented on Mar 12, 2025

    @oxalica
    oxalica
    on Mar 12, 2025
    Contributor

    Some update in LLVM: llvm/llvm-project#81048
    It tried to correctly handle clobbering of BX and BP on x86_64, but turns out the patch does not keep stack alignment correct.

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    A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.A-inline-assemblyArea: Inline assembly (`asm!(…)`)F-asm`#![feature(asm)]` (not `llvm_asm`)T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.

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