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RISC-V -mcmodel=medium #59802
Description
LLVM recently added some support for mcmodel=medium (which is equivalent to GCC's mcmodel=medany). I believe that this means that it is now possible to cherry pick the relevant commits and expose support from Rust.
See also: rust-embedded/wg/issues/218
Activity
laanwj commentedon Apr 16, 2019
great !
would be useful for me as well: Kendryte K210 expects code to run from fixed address
80000000, so medlow relocations get truncatedarunthomas commentedon Apr 27, 2019
Greetings from Oxidize!
It'd be great if someone could bump LLVM, so we can start adding support for Linux/RV64 targets. It was suggested @alexcrichton might be the person to ping about this.
@asb Is there a specific LLVM version you would recommend? I assume we want at least llvm/llvm-project@da20f5c, but I imagine there may be other upstream fixes that are needed.
Thanks!
CCing @Disasm @jamesmunns
fintelia commentedon Apr 27, 2019
@arunthomas Rust can already target bare metal Rv64 (with the riscv64imac-unknown-none-elf target). What is missing is the ability to place the code/symbols* at locations outside the range [-2GB, 2GB]. That isn't too much of an issue for writing supervisor mode code which can just configure the MMU to map those addresses to point to RAM, but machine mode can't pick the memory layout of the board it runs on.
*You actually can get away with having code outside this range as long as there aren't any indirect jumps or static variables there. It is very restrictive and inconvenient, but you might be able to get away with it for a small amount of code.
Disasm commentedon Apr 27, 2019
I also really want these patches to be merged. I've already tried to merge upstream branch as well as to deduce a cherry-pick-able set of commits but failed in both cases. Because of that, I can't tell whether these patches will fix the issue or not. At the moment I'm stuck waiting for help. I'm ready to give it another try, but I need some guidance. Maybe @alexcrichton or @asb could help me?
alexcrichton commentedon Apr 29, 2019
There's instructions/rationale about updating LLVM hosted at https://rust-lang.github.io/rustc-guide/codegen/updating-llvm.html. Instructions are slightly out of date but I'll send a PR to fix them.
Disasm commentedon Jun 23, 2019
(Current status) This patch arrived in LLVM: llvm/llvm-project@a524036
Now LLVM is able to generate pc-relative address load instructions for global variables and functions.
Rollup merge of rust-lang#62281 - Disasm:riscv-pic, r=nagisa
Auto merge of #62281 - Disasm:riscv-pic, r=nagisa