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hint::spin_loop invokes undefined behavior on targets without SSE2 #59237
Description
Currently hint::spin_loop is implemented with the pause instruction on all x86 / x86_64 targets, but this instruction is only available on CPUs with SSE2. The behavior of pause on CPUs without SSE2 is undefined.
This hint should not be implemented with inline assembly, but should call the appropriate core::arch intrinsics instead. Those explicitly state which features are required for each operation on each target.
Activity
Fanael commentedon Mar 17, 2019
This is incorrect:
pauseis defined in a way that makes it a harmless NOP on all earlier CPUs, and is even explicitly defined as such in Intel manuals:gnzlbg commentedon Mar 17, 2019
@Fanael indeed. Is there an advantage to emitting pause in earlier processors with respect to emitting nothing ?
Fanael commentedon Mar 17, 2019
Not that I know, there is no advantage on any of Intel's old microarchitectures, they just interpret it as a nop and have no special way of handling spin loops. It might be different on AMD's K7 or VIA Nehemiah, but I don't have that hardware to test, and I doubt it makes any difference anyway. It lets you avoid an ugly compile time conditional and that's it I think.
gnzlbg commentedon Mar 17, 2019
This bug report is invalid, thanks @Fanael .
Fix undefined behavior in hint::spin_loop for x86 targets without SSE2