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feat(vcr-sel): ship cmp→select fusion default-on — v0.13.0 (VCR-SEL-004, #428, #242) - #454
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…04, #428, #242) The byte-changing default-on flip the cmp→select arc has been building toward. ARM compare→select lowering now predicates the moves on the compare's own flags (`cmp; mov{c}; mov{invert(c)}`) instead of materializing+re-testing a boolean, −2 insns/select. .text shrinks on every function with a select (control_step 354→324, flight_seam 1016→902, flight_seam_flat 1240→1122; −262 B across the frozen fixtures); gale measured gust_mix 2.375×→2.125× vs LLVM. Results preserved — validated three independent ways BEFORE shipping: 1. named-anchor differentials re-run with fusion ON, same commit as the re-freeze: control_step still 0x00210A55 (13/13), flat+inlined flight_algo still 0x07FDF307. 2. unicorn execution oracle running the two-move mov{invert(c)} arm (cmp-select- oracle CI job, 11/11 off==on==wasmtime) — its unfused baseline now opts out via SYNTH_NO_CMP_SELECT_FUSE. 3. gale's gale_decider_diff sweep: 8 verified primitives, 10,596 cases, native ≡ unfused ≡ fused. - arm_backend.rs: fusion default-on; escape hatch SYNTH_NO_CMP_SELECT_FUSE=1. - frozen_codegen_bytes.rs: ARM goldens re-frozen to the fused .text (RV32 + signed_div_const unchanged — fusion is ARM-only / 0 sites); harness now locks the shipped (fused) path and removes the opt-out var. - version 0.12.0 → 0.13.0 (pin sweep: all path-deps + MODULE.bazel); CHANGELOG; VCR-SEL-004 status approved → implemented. Pending follow-up (gale, post-ship): on-silicon G474RE DWT cycle no-regression — user waived it as a release gate in favor of the qemu+sweep+oracle evidence. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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The flip ships
The byte-changing default-on flip the cmp→select arc (#449→#450→#451→#452→#453) has been building toward. ARM compare→select lowering now predicates the moves on the compare's own flags (
cmp; mov{c}; mov{invert(c)}) instead of materializing + re-testing a boolean — −2 instructions per select.gale measured
gust_mix2.375× → 2.125× vs LLVM (132 → 116 B function).Results preserved — validated three independent ways before shipping
0x00210A55(13/13 vs wasmtime), flat+inlined flight_algo still0x07FDF307. (The kill-check — these specific fixtures had never been executed with fusion on; they pass.)mov{invert(c)}arm (cmp-select-oracleCI job, 11/11off==on==wasmtime). Its unfused baseline now opts out viaSYNTH_NO_CMP_SELECT_FUSE.gale_decider_diffsweep: 8 verified primitives, 10,596 cases,native ≡ unfused ≡ fused.Changes
arm_backend.rs: fusion default-on; escape hatchSYNTH_NO_CMP_SELECT_FUSE=1reverts the lowering.frozen_codegen_bytes.rs: ARM goldens re-frozen to the fused.text(RV32 + signed_div_const unchanged — fusion is ARM-only / 0 sites); harness locks the shipped path.0.12.0 → 0.13.0(pin sweep: all path-deps +MODULE.bazel); CHANGELOG; VCR-SEL-004 statusapproved → implemented.Pending follow-up (gale, post-ship)
The on-silicon G474RE DWT cycle no-regression check — the user explicitly waived it as a release gate in favor of the qemu
-icount+ sweep + oracle evidence (the qemu proxy showed a monotonic win). gale takes it post-ship;SYNTH_NO_CMP_SELECT_FUSE=1is the in-field revert if it ever regresses.Part of epic #242. Merges → tag
v0.13.0→ crates.io.🤖 Generated with Claude Code