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Feature challenge: add an aarch64 (host-native) backend so output runs and debugs natively on arm64 dev machines #538
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on Jul 1, 2026 Shipped in v0.45.0 (tag pushed, commit 09fd6be). See the v0.45.0 CHANGELOG. Coordinator re-verified the lane oracle before merge; cold-reviewed SAFE-TO-TAG.
Milestone 2 shipped in v0.45.0 (7→50 integer ops, 175/175 native differential). Remaining (m3, follow-up): f32/f64 scalar A64 lowering (scaffolded, decoder-dropped) and trapping i32/i64 / (A64 SDIV/UDIV don't trap on /0 or INT_MIN÷-1 — needs explicit trap guards, the more-total-than-WASM soundness class). Closing the milestone-2 challenge; m3 is a clean follow-up if/when a consumer needs A64 floats or division.
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on Jul 16, 2026 Milestone 3 (scalar floats, 0→35) shipped in v0.46.0. Milestone 4 (sound trapping float→int + NaN-correct min/max + copysign, 35→46) is in review as PR #790 for v0.47. Remaining after m4: rounding ops, i64↔float, div/rem (trap guards), popcnt.
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on Jul 17, 2026 Milestone 4 shipped in v0.47.0 (35→46 ops: sound trapping trunc w/ 32 execution-verified trap cases, IEEE-754-2019 min/max, copysign, f32.sqrt). Remaining (m5 candidates): rounding ops, i64↔float, div/rem w/ trap guards, popcnt — all loud-declined + gate-pinned. trunc_sat family lands with #782 (v0.48).
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on Jul 22, 2026
Filed by the PulseEngine challenge harness (synth v0.17.0). Feature challenge, not a defect.
Gap
synth emits Thumb-2 (Cortex-M) and RV32 bare-metal ELF only. On an aarch64 development host (Apple Silicon, arm64 Linux/CI), there is no way to execute or debug synth's output natively — every functional/debug check must go through QEMU/Renode emulation.
Why it matters for the toolchain's own testing
The differential-testing story (wasm in wasmtime as oracle vs synth's compiled artifact) and the DWARF/debugging story both get materially cheaper and faster if synth can target the host ISA:
--debug-lineDWARF work (Emit DWARF in the ARM/RISC-V ELF — synth drops debug info; bare-metal output is not source-debuggable #394) and you canlldb/gdbsynth output on the same machine that built it, validating the line tables against real breakpoints instead of onlyllvm-dwarfdump --verify.Scope / suggestion
Even a minimal AArch64 (A64) integer-subset backend reachable via
-b aarch64(mirroring how-b riscvwas added) would unlock native execution + debugging for the i32/i64/control-flow core that already has the strongest proofs. Float/SIMD can follow.Acceptance idea
synth compile add.wat -b aarch64 -o add.oproduces a host-linkable object that runs and returns the same result as the wasm in wasmtime, and--debug-line, a breakpoint on a known source line inlldbstops at the matching instruction.Happy to contribute the differential + debug acceptance probes from the challenge harness.