[Aaron-Hartwig]

The FPGA images included in this commit will timeout an I2C transaction after a period (currently a 27ms parameter). This will get mapped to the HwError::I2CTransactionTimeout variant in the transceiver-messages' HwError enum.

fixes #2070

[Aaron-Hartwig]

I tested this locally by disabling the thermal loop so there would not be any I2C traffic to the modules that I didn't initiate. Since there's no scrimlet or dendrite in this context, I manually put the modules in low-power state and checked that I could read from them:

$ ./target/debug/xcvradm -i onboard0 -t present set-power low
$ ./target/debug/xcvradm -i onboard0 -t present vendor-info
Port Identifier               Vendor           Part             Rev  Serial           Mfg date
   0 Qsfp28 (0x11)            FS               QSFP-100G-PC005  A    C2506055987-2    250606
   1 Qsfp28 (0x11)            FS               QSFP-100G-PC005  A    C2506055987-1    250606
   2 QsfpPlusCmis (0x1e)      FS               QSFP-SR4-200G    01   C2508595099      250829
   3 QsfpPlusCmis (0x1e)      FINISAR CORP.    FTCC1112E2PCL    A    X65BPQR          210901
   4 QsfpPlusCmis (0x1e)      Intel Corp       SPTSMP3CLCDA     03   CRFR213905JEP    21101800

Then I set the new PortDebug::ForceI2cTimeout register for port 0 which automatically times out the next transaction:

$ humility hiffy -c Fpga.user_design_read_reg -t ecp5_front_io -a device_index=0x0,addr=0x290
humility: attached via ST-Link V3
Fpga.user_design_read_reg() => 0x0

$ humility hiffy -c Fpga.user_design_write_reg -t ecp5_front_io -a device_index=0x0,addr=0x290,value=0x1,op=BitSet
humility: attached via ST-Link V3
Fpga.user_design_write_reg() => ()

$ humility hiffy -c Fpga.user_design_read_reg -t ecp5_front_io -a device_index=0x0,addr=0x290
humility: attached via ST-Link V3
Fpga.user_design_read_reg() => 0x1

Which we then see make the interaction with port 0 fail on the next attempt:

$ ./target/debug/xcvradm -i onboard0 -t present vendor-info
Port Identifier               Vendor           Part             Rev  Serial           Mfg date
   1 Qsfp28 (0x11)            FS               QSFP-100G-PC005  A    C2506055987-1    250606
   2 QsfpPlusCmis (0x1e)      FS               QSFP-SR4-200G    01   C2508595099      250829
   3 QsfpPlusCmis (0x1e)      FINISAR CORP.    FTCC1112E2PCL    A    X65BPQR          210901
   4 QsfpPlusCmis (0x1e)      Intel Corp       SPTSMP3CLCDA     03   CRFR213905JEP    21101800
Some operations failed, errors below
Port Error
   0 Hardware error accessing module 0: The transaction timed out

This was with a local version of xcvradm from the branch which contains the required update (oxidecomputer/transceiver-control#431).