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Refactor: resolve prepare-phase DFX config from the run's own CallConfig - #2161
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`prepare_execution` read the five diagnostics enables, the swimlane and
dump levels, the PMU event type and `output_prefix` off the runner. Those
members are bound by `apply_call_config()`, which `simpler_prepare_run`
skips when the prepare overlaps an in-flight predecessor:
// Diagnostic binding reads runner-global collector configuration. It
// is depth-one, while concurrent HBG preparation must leave the active
// run's configuration untouched until launch.
if (!overlaps_active_run) runner->apply_call_config(state->config);
So on an overlapping prepare the members still describe the predecessor,
and the successor would arm its collectors — and build the device-side
`enable_profiling_flag` — from the wrong run's configuration. That is one
of the two reasons `diagnostics_any()` currently forces pipeline depth
back to 1.
`prepare_execution` already receives the run's own `CallConfig`. Resolve
the values from it instead, through a `DfxRunConfig` that applies the same
derivations the setters do, so the two cannot disagree about what a level
or an event type means. The three `init_*` that bound per-run collector
configuration from members now take it as arguments.
No behavior change: the gate makes `overlaps_active_run` false whenever
any channel is on, so the resolved values are today identical to the
members. This removes the config half of the reason the gate exists; the
other half — the arming sequence writing resident collector state during
prepare — is separate and unaddressed here.
One prepare-phase write to a runner member remains, on both a5 runners:
the PMU-init-failure path sets `enable_pmu_ = false` to degrade the run.
That has to reach the launch arming and the teardown, and neither can see
a local, so it stays and is now commented as the one value this prepare
still writes runner-wide. a2a3 fails the whole run on the same error
rather than degrading — an undocumented arch divergence, left alone.
Verified per DFX channel in the shapes `_st-sim-{a2a3,a5}.yml` uses; a
bare sweep enables no channel and cannot fail on a collector defect. 12
channel runs, 23 cases, green on both sim platforms. The negative control
fires on a consumer of the changed value: with `DfxRunConfig::from()`
resolving an empty `output_prefix`, the PMU channel fails with `pmu.csv
missing`. It does not fire on scope_stats, whose artifact path comes from
the runner member at teardown rather than from this resolution.
Full sim sweeps green on both platforms, cpput 135/135, pyut 2224 passed
/ 18 skipped, and onboard a2a3 smokes green under `task-submit`: PMU 1
passed, dep_gen + chip_swimlane 6 passed.
📝 WalkthroughWalkthroughThe change adds ChangesPer-run DFX configuration
Estimated code review effort: 3 (Moderate) | ~20 minutes Merge Risk: 🟡 Moderate · up to Overlapping onboard runs can still apply a predecessor’s diagnostic settings and output prefix during launch or drain, producing incorrect collection behavior and dependency output paths. This should be resolved before merge. 🚥 Pre-merge checks | ✅ 4 | ❌ 1❌ Failed checks (1 warning)
✅ Passed checks (4 passed)
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Inline comments:
In `@src/a2a3/platform/sim/host/device_runner.cpp`:
- Around line 328-331: Update src/a5/platform/onboard/host/device_runner.cpp at
lines 266-269: store DfxRunConfig in PreparedExecution and have
launch_execution() and drain_execution() use that prepared configuration for
enable_dep_gen_, enable_chip_swimlane_, and output_prefix_; add an overlap
regression alternating DFX flags and output prefixes to verify each successor
follows its CallConfig. The sites src/a2a3/platform/sim/host/device_runner.cpp
lines 328-331 and src/a5/platform/sim/host/device_runner.cpp lines 333-336
require no direct change because simulated runners reject active runs before
preparing successors.
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📒 Files selected for processing (9)
src/a2a3/platform/onboard/host/device_runner.cppsrc/a2a3/platform/onboard/host/device_runner.hsrc/a2a3/platform/sim/host/device_runner.cppsrc/a2a3/platform/sim/host/device_runner.hsrc/a5/platform/onboard/host/device_runner.cppsrc/a5/platform/onboard/host/device_runner.hsrc/a5/platform/sim/host/device_runner.cppsrc/a5/platform/sim/host/device_runner.hsrc/common/platform/include/host/dfx_run_config.h
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@coderabbitai addressed the review — one deferral with reasons, one deliberate skip. Deferred, not dismissed — launch/drain reading runner members (inline thread resolved with The stated consequences do not follow, because The fix is the next change on this line, and doing half of it here would leave the prepare-phase Skipping — Docstring Coverage (30% vs 80%). Same disposition as #2148, where you reviewed the This is also not a repository CI gate — the The review summary body enumerated only the inline comment above, so it is covered by that reply. |
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Summary
prepare_executionread the five diagnostics enables, the swimlane and dump levels, the PMUevent type and
output_prefixoff the runner. Those members are bound byapply_call_config(), whichsimpler_prepare_runskips when the prepare overlaps an in-flightpredecessor — the code says so at the binding site:
So on an overlapping prepare the members still describe the predecessor, and the successor
would arm its collectors — and build the device-side
enable_profiling_flag— from the wrongrun's configuration. That is one of the two reasons
diagnostics_any()currently forcespipeline depth back to 1.
prepare_executionalready receives the run's ownCallConfig. This resolves the values fromit instead, through a
DfxRunConfigthat applies the same derivations the setters do so thetwo cannot disagree about what a level or an event type means.
What this does and does not settle
The arming block turned out to hold two kinds of content, and only one is destructive to a
predecessor:
enable_profiling_flag;output_prefix→make_pmu_csv_path; the level →initialize()'s pool sizingbegin_run()'s reset,finalize_collectors(),latch_collector_shape()Splitting it this way also avoids a problem the "move the whole arming to launch" shape would
have hit:
prepare_executionends withinit_device_kernel_args(), which uploadskernel_argsto the device. The device pointers and the profiling flag the
init_*publish must be in itbefore that upload, so they cannot simply move to launch. Sourcing them correctly keeps them
where they are.
No behavior change. The gate makes
overlaps_active_runfalse whenever any channel is on,so the resolved values are today identical to the members.
One write stays
Both a5 runners degrade on PMU init failure with
enable_pmu_ = false. That has to reach thelaunch arming and the teardown, and neither can see a local, so it stays — now commented as the
one DFX value this prepare still writes runner-wide.
Noticed while reading, not changed here: a2a3 fails the whole run on the same error where a5
degrades. An undocumented arch divergence; worth its own issue rather than a drive-by.
Testing
Per DFX channel, in the shapes
_st-sim-{a2a3,a5}.ymluses. A barepytest tests/stenablesno channel, and every artifact assertion in these tests sits behind
if not request.config.getoption("--enable-<channel>"): return— so a bare sweep cannot fail ona collector defect.
12 channel runs, 23 cases, green on both sim platforms.
DfxRunConfig::from()resolving an empty
output_prefix, the PMU channel fails withpmu.csv missing under outputs/TestPmu_default_.... It does not fire on scope_stats,whose artifact path comes from the runner member at teardown rather than from this
resolution — worth stating, since picking that channel first would have produced a false
all-clear.
examples tests/st) green on a2a3sim and a5simtask-submit --device auto: PMU 1 passed, dep_gen + chip_swimlane 6 passedclang-format --dry-run --Werrorclean on all nine filesOne pyut run reddened on
test_failed_startup_reaps_children_no_leakand then passed both inisolation (0.20 s) and on a full re-run. It is a
_hard_timeout(_TEST_WALL_BUDGET_S)wall-clockbudget over a fork-and-reap, and this change is C++-only in a path pyut's worker startup neither
compiles nor loads.
Notes
Part of #2078's remaining line. The other half of what the depth-1 gate protects — the arming
sequence writing resident collector state during prepare — is the next change; the gate cannot
come off until both land.
Related: #2078