Fix: gate the device-phase timing buffer's per-run transfers on capture

[ChaoZheng109]

Fixes #1642.

Problem

Every simpler_run performed three device↔host transfers around the AICPU device-phase / task-timing buffer, all unconditional:

#	Op	Dir	a2a3 / a5
1	ensure_device_wall_buffer() H2D reset	H→D	2496 B / 5824 B
2	read_device_wall_ns() phase-region D2H	D→H	960 B / 2240 B
3	read_device_wall_ns() task-timing tail D2H	D→H	1536 B / 3584 B

The only consumer of the readback is emit_device_phase_markers(), which is double-gated (compile-time SIMPLER_HOST_STRACE — STRACE_DEV_SPAN_AT compiles to nothing when off — and runtime SIMPLER_DEVICE_STRACE_ENABLE). The producers were not gated: the only guard was "is the buffer allocated", which the lazy allocator makes true for the process lifetime after the first run. No other code reads last_device_wall_ns / last_device_phase_ns / last_task_slot_*. So with device strace disabled, all three transfers ran every run and the data was discarded — per-run latency on the dispatch/decode hot path.

Fix

Gate the producer on the same condition as the consumer. device_phase_capture_enabled() (compile gate ∧ runtime env) is now the single predicate both sides share:

• ensure_device_wall_buffer() early-returns when capture is off → no allocation, no H2D reset (transfer Multi-threaded AICPU Scheduler with Parallel Task Dispatch #1). The buffer stays unallocated, so KernelArgs::device_wall_data_base stays 0 and the AICPU stamps nothing — device_phase_aicpu.h no-ops at base 0, so no device-side write is stranded and the chip cannot hang.
• read_device_wall_ns() early-returns when capture is off → no D2H readbacks (transfers Refactor AICPU core assignment to support dynamic block distribution #2, efactor: Rename Graph to Runtime to Better Reflect Its Responsibility #3).
• emit_device_phase_markers() now calls the shared predicate instead of its own local device_profiling_enabled() env read (single source of truth; also drops the now-unused <cstdlib> include).

When capture is on, the code path is byte-identical to before (allocate + reset + read + emit).

Scope

• Onboard only. The sim path keeps its own separate gate (its "transfers" are in-process memory writes, not device DMA).
• Observation 1 of the issue only. The task-timing tail is still copied when capture is on but no task is tagged (observation 2). That needs a device-written "any task tagged" marker across all four runtime trees + a wire-layout change; split out as [Code Health] Task-timing tail is copied D2H every profiling run even when no task is tagged #1656.

Verification

• Compile: full from-scratch rebuild of both a2a3 and a5 onboard runtimes (host_build_graph + tensormap_and_ringbuffer) — clean. Pre-commit clang-format / clang-tidy / cpplint pass.
• Onboard hardware: this box currently reports no detectable silicon (npu-smi returns no chip), so the device-behavior check (markers still emitted with capture on; absent with capture off; no regression) is left to CI's st-onboard-a2a3 / st-onboard-a5 jobs. The change is correct by construction: with capture on the path is unchanged, and the AICPU null-base no-op is an existing, documented guarantee.

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📝 Walkthrough

Walkthrough

Changes

Device phase capture

Layer / File(s)	Summary
Define and cache the capture gate src/common/platform/onboard/host/device_runner_base.h, src/common/platform/onboard/host/device_runner_base.cpp	The host runtime declares device_phase_capture_enabled() and caches the SIMPLER_DEVICE_STRACE_ENABLE runtime gate.
Skip disabled capture operations src/common/platform/onboard/host/device_runner_base.cpp, src/common/platform/onboard/host/c_api_shared.cpp	Disabled capture skips buffer reset and readbacks. Marker emission uses the shared capture gate.

Estimated code review effort: 2 (Simple) | ~10 minutes

Sequence Diagram(s)

sequenceDiagram
  participant DeviceRunnerBase
  participant DeviceWallBuffer
  participant CApiShared
  DeviceRunnerBase->>DeviceWallBuffer: reset and read timing data when capture is enabled
  DeviceRunnerBase->>DeviceWallBuffer: skip transfers when capture is disabled
  CApiShared->>DeviceRunnerBase: query device_phase_capture_enabled()
  DeviceRunnerBase-->>CApiShared: capture state
  CApiShared->>CApiShared: emit markers when enabled

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Possibly related issues

• [Code Health] Task-timing tail is copied D2H every profiling run even when no task is tagged #1656 — Directly implements the shared device-phase capture gate described by this change.

Possibly related PRs

• hw-native-sys/simpler#1322 — Overlaps in the device-phase capture gating code across the same host runtime files.

Poem

A rabbit guards the timing gate,
No needless buffers wait or wake.
When strace calls, the markers shine;
When disabled, transfers decline.
Hop, hop—the host now skips the load!

🚥 Pre-merge checks | ✅ 5

✅ Passed checks (5 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title clearly and concisely identifies gating per-run device-phase timing transfers on capture.
Description check	✅ Passed	The description directly explains the problem, implementation, scope, and verification for the device-phase transfer gating changes.
Linked Issues check	✅ Passed	The changes satisfy issue #1642 by gating allocation, H2D reset, and both D2H readbacks with the shared capture predicate.
Out of Scope Changes check	✅ Passed	All changes are limited to onboard device-phase capture gating and its shared predicate; no unrelated code changes are identified.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.

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