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[serge] Fix 2 integration tests for model cvt failing with output_mismatch (tensor values differ (2)) - #49076

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ydshieh merged 1 commit into
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serge/fix/itf-477e48fb6236-89a29870
Sep 25, 2026
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ydshieh merged 1 commit into
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serge/fix/itf-477e48fb6236-89a29870

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@sergereview sergereview Bot commented Sep 24, 2026 •

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CPU CI GPU run-slow

Original CI failure

  • Failure group: 2 integration tests for model cvtfailing withoutput_mismatch (tensor values differ (2))
  • tests/models/cvt/test_modeling_cvt.py::CvtModelIntegrationTest::test_inference_image_classification_head [multi-gpu] (output_mismatch, seen 21/21)
CI traceback — tests/models/cvt/test_modeling_cvt.py::CvtModelIntegrationTest::test_inference_image_classification_head
(line 278)  AssertionError: Tensor-likes are not close!

Where to watch it:

Relates to #49074

CvtModelIntegrationTest::test_inference_image_classification_head fails on CUDA because the first three logits differ from the stored (None, None) expectation by ~0.0003 absolute / ~0.09% relative, just outside the test's rtol=2e-4, atol=2e-4 tolerance.

This is the same sm_86 numeric drift pattern addressed in #48168 (e.g. table_transformer, focalnet): the generic expectation remains valid elsewhere, and a device-keyed ("cuda", 8) entry captures the small backend-specific variation.

The new ("cuda", 8) value torch.tensor([0.9280, 0.9023, -0.3142]) is the actual output rounded to the same precision as the existing ("xpu", 5) entry; it differs from the generic key by at most 0.0003, consistent with known hardware drift and well within the 1% relative bound seen in prior expectation updates.


✅ Verified on GPU

serge ran the targeted @slow test(s) on a GPU runner and opened this PR only after they passed with this patch. Each targeted test was run 5× on both the pre-patch and patched trees to rule out flakiness — the result held on every run.

Possibly related

Existing issues/PRs mentioning test_inference_image_classification_head (keyword match — not verified to share a root cause):

  • #48589 — Synthetic test assets (PR, closed, updated 2026-09-10)
  • #48637 — [tests] Fix integration test golden values broken by fast image processor default (PR 🚨Default to fast image processors for all models #41388) (PR, closed, updated 2026-09-09)
  • #48168 — Fix integration test expected values for cuda sm_86 (Mar 15 regressions) (PR, closed, updated 2026-08-21)
  • #47173 — Fix some failed test cases related with XPU Expectations (PR, closed, updated 2026-07-23)
  • #41693 — 🚨 Refactor ViT to updated standards (PR, closed, updated 2026-05-08)

This change was produced automatically by serge from a CI failure report. The patch was generated by an LLM and applied by serge; review before merging.

serge v0.1.0 · model: moonshotai/Kimi-K2.7-Code · 55 LLM turns · 54 tool calls · 41.5s · 1247299 in / 4442 out tokens

@sergereview
sergereview Bot marked this pull request as ready for review September 24, 2026 08:20
@github-actions
github-actions Bot requested a review from ydshieh September 24, 2026 08:21
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[For maintainers] Suggested jobs to run (before merge)

run-slow: cvt

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CI recap

Dashboard: View test results in Grafana
Latest run: 35974699313
Result: success | Grafana metrics are not available yet.

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The docs for this PR live here. All of your documentation changes will be reflected on that endpoint. The docs are available until 30 days after the last update.

@ydshieh

ydshieh commented Sep 25, 2026

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run-slow: cvt

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AMD CI

Workflow Run ⚙️

This comment contains run-slow, running the specified jobs on AMD:

models: ["models/cvt"]

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Nvidia CI

Workflow Run ⚙️

This comment contains run-slow, running the specified jobs on Nvidia:

models: ["models/cvt"]
quantizations: []

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CI Results (Nvidia)

Workflow Run ⚙️

Commit Info

Context Commit Description
RUN 67041657 workflow commit (merge commit)
PR 1394893e branch commit (from PR)
main 5e4d6304 base commit (on main)

⚠️ No test being reported (jobs are skipped or cancelled)!

@ydshieh

ydshieh commented Sep 25, 2026

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Investigation notes

Failing since 2026-04-06 — triggered by the torch 2.11 CI update (499ef1d7, merged 2026-04-04) and the follow-up TF32 fix commit 374d44d54a (2026-04-06) which changed how cuDNN TF32 is configured in tests, causing a numeric drift on sm_86 hardware.

The 2026-05-13 pass→fail transition looked suspicious but turns out to be a CI runner fluke (different hardware assigned that day), not a code fix.

Verified on current CI env (torch 2.14, sm_86): ran the test across all 3 relevant commits with debug prints — all produce identical values:

Commit Date CI transition logits[:3]
2ad5a9b8 2026-05-13 fail → pass (runner fluke) [0.9280022, 0.9022639, -0.3142087]
167de6a2 2026-05-14 pass → fail [0.9280022, 0.9022639, -0.3142087]
main (current) — still failing [0.9280022, 0.9022639, -0.3142087]

No regression — all three commits produce identical outputs on this hardware. The drift is purely a CI environment difference (sm_86 vs other hardware). PR is good.

@ydshieh
ydshieh merged commit 11c1661 into main Sep 25, 2026
42 of 43 checks passed
@ydshieh
ydshieh deleted the serge/fix/itf-477e48fb6236-89a29870 branch September 25, 2026 12:02
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