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6 changes: 3 additions & 3 deletions src/tri27/emu/decoder.zig
Original file line number Diff line number Diff line change
Expand Up @@ -13,9 +13,9 @@ const std = @import("std");
// of gHashTag/t27 specs/isa/ternary_encoding.t27 (t27a_imm_form,
// t27a_src2_form, t27a_src1, t27a_src2, t27a_imm, t27a_encode), and
// tri27_encoding.zig is that spec's `t27c gen` output, byte for byte, never
// hand-edited. Recorded at the vendoring (gHashTag/t27#6507, gHashTag/t27#6789):
// spec sha256 5e2c265a0972189ccf887d523abb86c13f9fa7ae6a1f35a59c20f1a1fc4796cd
// generated sha256 da08bb8d44888dd747b11de4476d75395921f3fbc11754acb9532a218ffa3fad
// hand-edited. Recorded at the last vendoring (gHashTag/t27#6507, gHashTag/t27#6895):
// spec sha256 563b6ca610274d48010c05fca146634edcde13c391fcea3f44cc2790171530d6
// generated sha256 0979161dbda5a2cf5077f3dcb45321382949b9a811ae1d4e7e4d2ced85afa695
// (= gen_hash_zig of t27 .trinity/seals/isa_Tri27Encoding.json)
// To move it, regenerate from t27 (`t27c gen specs/isa/ternary_encoding.t27`)
// and replace the file; do not edit a field position in this one.
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2 changes: 1 addition & 1 deletion src/tri27/emu/tri27_encoding.zig
Original file line number Diff line number Diff line change
Expand Up @@ -106,7 +106,7 @@ pub const T27A_IMM_FORM_COUNT: u32 = 24;
pub const T27A_SRC2_FORM_COUNT: u32 = 11;
pub const T27A_TWO_OPERAND_COUNT: u32 = 12;
pub const T27A_FIELD_RULE: []const u8 = "t27a: the immediate form is IMM_FORM plus SACR (src1 four bits, its mode in the immediate); the three-operand form is SRC2_FORM plus DOT, BIND, BUNDLE2, BUNDLE3; BUNDLE3 also writes its third register at bits 27:23; every other opcode writes dst and a five-bit src1 only";
pub const T27A_CONSUMER_GAP: []const u8 = "decoder.zig at PINNED_REVISION reads src2 of DOT, BIND, BUNDLE2 as 0 and the immediate of SACR as 0; the t27a table is not yet the emulator's";
pub const T27A_CONSUMER: []const u8 = "gHashTag/trinity src/tri27/emu/decoder.zig since 180b29ef (trinity#1437) decodes and encodes through t27a_src1, t27a_src2, t27a_imm, t27a_imm_form and t27a_encode, vendored as src/tri27/emu/tri27_encoding.zig";
pub const FINDING_COUNT: u32 = 6;
pub const FINDINGS: [6][]const u8 = .{ "src/tri27/emu/encoder_simple.zig puts a sixteen-bit immediate at bit 16 (loads, stores) or bit 8 (jumps, calls); src/tri27/emu/asm_parser.zig, the assembler behind `tri tri27 assemble`, uses it, so its words are misread by decoder.zig", "src/tri27/emu/specs/tbin_format.md puts the opcode in bits 31:24 and a four-bit immediate in bits 3:0", "docs/tri27/t27_format.md puts a six-bit opcode in bits 31:26 and an eight-bit immediate in bits 7:0, with opcode numbers (ADD 0x60 ... DEC 0x65) that collide with DOT 0x60", "docs/tri27/README.md puts a six-bit opcode in bits 8:5", "src/tri27/emit_zig.zig emits a VM whose decoder reads the opcode from bits 31:24 and packs bytes big-endian; it also switches on LTI, PUSH, POP and RESET, which no enum declares", "the encoder_simple.zig enum lists 36 opcodes and misses MOV, EXP, SIN, JGT, JLT and every STR_ and FILE_ opcode; every document says 36, the decoder declares 47" };
pub const ENABLED: bool = true;
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