arm64: Improve ARM64 JIT code generation and register allocation

Correct spill scoring for consecutive vector registers.
Skip unnecessary upper-vector restores during register allocation.
Make consecutive-register filtering and spill selection more efficient. arm64: Select REG_ORDER candidates with ordered masks #136836
Reduce work when choosing registers while preserving preference order.
Avoid unused vector temporary registers and unnecessary copies. arm64: Avoid unused vector constant temps and prefer no-op casts #136705
Improve register choices for CMPXCHG, CKFINITE, and dynamic stackalloc.
Improve lowering and code generation for selects, rotates, constants, and TLS loads. arm64: Improve lowering and code generation #136702

Continue looking for other ARM64 JIT optimizations as these changes are tested and refined.

@JulieLeeMSFT

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Fold shifted extensions into arithmetic and comparisons. #136715

Preserve extending loads when selecting ADD operands. #136872

@dhartglassMSFT

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