Add adaq2387x support

Documentation/devicetree/bindings/iio/adc/lltc,ltc2387.yaml

@@ -2,7 +2,7 @@
 # Copyright 2022 Analog Devices Inc.
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/bindings/iio/adc/ltc2387.yaml#
+$id: http://devicetree.org/schemas/iio/adc/lltc,ltc2387.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
 title: Linear Technology / Analog Devices LTC2387 ADC
@@ -50,10 +50,40 @@ properties:
       - const: cnv
       - const: clk_en
 
+  vref-supply:
+    description:
+      External voltage reference. When absent the device's internal 4.096 V
+      reference is assumed.
+
   adi,use-two-lanes:
     description: The device uses two lanes for data transfer
     type: boolean
 
+  adi,use-one-lane:
+    description: |
+      Configure the device for one-lane output mode. In one-lane mode a
+      single physical LVDS pair (DA) carries all 16/18 bits per conversion
+      via DDR, halving the achievable sample rate compared to two-lane
+      mode. Omit for the default two-lane behavior.
+    type: boolean
+
+  adi,gain-milli:
+    description: |
+      Front-end amplifier gain, expressed as gain * 1000. Only meaningful
+      for the ADAQ2387x modules, which integrate a fully-differential
+      amplifier ahead of the LTC2387 die; the value must match the board's
+      pin strapping.
+
+        ADAQ23875:           fixed gain = 2  (2000)
+        ADAQ23876/ADAQ23878: pin-selectable (370, 730, 870, 1380, 2250)
+
+      Used by the driver to compute in_voltage_scale referred to the SMA
+      input. When omitted the driver assumes a per-compatible default:
+      1000 (unity) for the bare ltc2387-* parts, which have no amplifier,
+      and 2000 for the adaq2387x parts.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [370, 730, 870, 1000, 1380, 2000, 2250]
+
 required:
   - compatible
   - clocks
@@ -62,16 +92,16 @@ required:
   - pwms
   - pwm-names
 
+additionalProperties: false
+
 examples:
   - |
-    ltc2387@0{
+    adc {
             compatible = "ltc2387-16";
             clocks = <&clk 0>;
             dmas = <&dma 0>;
             dma-names = "rx";
-            pwms = <&pwm 0 0
-                    &pwm 1 0>;
+            pwms = <&pwm 0 0>, <&pwm 1 0>;
             pwm-names = "cnv", "clk_en";
-
-            adi,use-two-lanes;
+            vref-supply = <&vref>;
     };

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23875-1lane.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Analog Devices ADAQ23875 (LTC2387-16 inside, 16-bit, one-lane mode).
+ *
+ * Pair with the matching one-lane HDL bitstream (TWOLANES=0, ADC_RES=16).
+ *
+ * hdl_project: <adaq2387x/zed with ADC_RES=16, TWOLANES=0>
+ * board_revision: <A>
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+/dts-v1/;
+
+#include "zynq-zed-adv7511-adaq23875.dtsi"
+
+&adaq23875 {
+	adi,use-one-lane;
+};

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23875.dts

@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Analog Devices ADAQ23875 (LTC2387-16 inside, 16-bit, two-lane mode).
+ *
+ * hdl_project: <adaq2387x/zed with ADC_RES=16, TWOLANES=1>
+ * board_revision: <A>
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+/dts-v1/;
+
+#include "zynq-zed-adv7511-adaq23875.dtsi"

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23875.dtsi

@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ADAQ23875 (LTC2387-16) on Zedboard.
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+
+#include "zynq-zed-adv7511-adaq2387x.dtsi"
+
+&rx_dma {
+	adi,channels {
+		#size-cells = <0>;
+		#address-cells = <1>;
+
+		dma-channel@0 {
+			reg = <0>;
+			adi,source-bus-width = <16>;
+			adi,source-bus-type = <2>;
+			adi,destination-bus-width = <64>;
+			adi,destination-bus-type = <0>;
+		};
+	};
+};
+
+&fpga_axi {
+	adaq23875: adc@0 {
+		compatible = "adaq23875";
+		clocks = <&ext_clk>;
+		dmas = <&rx_dma 0>;
+		dma-names = "rx";
+		pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>;
+		pwm-names = "cnv", "clk_en";
+		vref-supply = <&vref>;
+
+		/* Fixed FDA gain = 2, +/-2.048 V input range. */
+		adi,gain-milli = <2000>;
+	};
+};

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23876-1lane.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Analog Devices ADAQ23876 (LTC2387-16 inside, 16-bit, one-lane mode).
+ *
+ * Pair with the matching one-lane HDL bitstream (TWOLANES=0, ADC_RES=16).
+ *
+ * hdl_project: <adaq2387x/zed with ADC_RES=16, TWOLANES=0>
+ * board_revision: <A>
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+/dts-v1/;
+
+#include "zynq-zed-adv7511-adaq23876.dtsi"
+
+&adaq23876 {
+	adi,use-one-lane;
+};

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23876.dts

@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Analog Devices ADAQ23876 (LTC2387-16 inside, 16-bit, two-lane mode).
+ *
+ * hdl_project: <adaq2387x/zed with ADC_RES=16, TWOLANES=1>
+ * board_revision: <A>
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+/dts-v1/;
+
+#include "zynq-zed-adv7511-adaq23876.dtsi"

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23876.dtsi

@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ADAQ23876 (LTC2387-16) on Zedboard.
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+
+#include "zynq-zed-adv7511-adaq2387x.dtsi"
+
+&rx_dma {
+	adi,channels {
+		#size-cells = <0>;
+		#address-cells = <1>;
+
+		dma-channel@0 {
+			reg = <0>;
+			adi,source-bus-width = <16>;
+			adi,source-bus-type = <2>;
+			adi,destination-bus-width = <64>;
+			adi,destination-bus-type = <0>;
+		};
+	};
+};
+
+&fpga_axi {
+	adaq23876: adc@0 {
+		compatible = "adaq23876";
+		clocks = <&ext_clk>;
+		dmas = <&rx_dma 0>;
+		dma-names = "rx";
+		pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>;
+		pwm-names = "cnv", "clk_en";
+		vref-supply = <&vref>;
+
+		/* Pin-strapped: 370, 730, 870, 1380 or 2250. */
+		adi,gain-milli = <870>;
+	};
+};

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23878-1lane.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Analog Devices ADAQ23878 (LTC2387-18 inside, 18-bit, one-lane mode).
+ *
+ * Pair with the matching one-lane HDL bitstream (TWOLANES=0, ADC_RES=18).
+ *
+ * hdl_project: <adaq2387x/zed with ADC_RES=18, TWOLANES=0>
+ * board_revision: <A>
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+/dts-v1/;
+
+#include "zynq-zed-adv7511-adaq23878.dtsi"
+
+&adaq23878 {
+	adi,use-one-lane;
+};

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23878.dts

@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Analog Devices ADAQ23878 (LTC2387-18 inside, 18-bit, two-lane mode).
+ *
+ * hdl_project: <adaq2387x/zed with ADC_RES=18, TWOLANES=1>
+ * board_revision: <A>
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+/dts-v1/;
+
+#include "zynq-zed-adv7511-adaq23878.dtsi"

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23878.dtsi

@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ADAQ23878 (LTC2387-18) on Zedboard.
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+
+#include "zynq-zed-adv7511-adaq2387x.dtsi"
+
+&rx_dma {
+	adi,channels {
+		#size-cells = <0>;
+		#address-cells = <1>;
+
+		dma-channel@0 {
+			reg = <0>;
+			adi,source-bus-width = <32>;
+			adi,source-bus-type = <2>;
+			adi,destination-bus-width = <64>;
+			adi,destination-bus-type = <0>;
+		};
+	};
+};
+
+&fpga_axi {
+	adaq23878: adc@0 {
+		compatible = "adaq23878";
+		clocks = <&ext_clk>;
+		dmas = <&rx_dma 0>;
+		dma-names = "rx";
+		pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>;
+		pwm-names = "cnv", "clk_en";
+		vref-supply = <&vref>;
+
+		/* Pin-strapped: 370, 730, 870, 1380 or 2250. */
+		adi,gain-milli = <870>;
+	};
+};

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq2387x.dtsi

@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Shared carrier pieces for the ADAQ2387x modules on Zedboard.
+ *
+ * ext_clk must match the reference clock the HDL bitstream produces.
+ *
+ * Copyright (C) 2026 Analog Devices Inc.
+ */
+
+#include "zynq-zed.dtsi"
+#include "zynq-zed-adv7511.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+	vref: regulator-vref {
+		compatible = "regulator-fixed";
+		regulator-name = "vref-4v096";
+		regulator-min-microvolt = <4096000>;
+		regulator-max-microvolt = <4096000>;
+		regulator-always-on;
+	};
+
+	clocks {
+		ext_clk: clock@0 {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <120000000>;
+			clock-output-names = "ref_clk_120m";
+		};
+	};
+
+	gpio-control@0 {
+		compatible = "adi,one-bit-adc-dac";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		out-gpios = <&gpio0 86 GPIO_ACTIVE_HIGH>,
+			    <&gpio0 87 GPIO_ACTIVE_HIGH>;
+		channel@0 {
+			reg = <0>;
+			label = "adaq2387x_testpat";
+		};
+		channel@1 {
+			reg = <1>;
+			label = "adaq2387x_pd";
+		};
+	};
+};
+
+&fpga_axi {
+	rx_dma: dma-controller@44a30000 {
+		compatible = "adi,axi-dmac-1.00.a";
+		reg = <0x44a30000 0x1000>;
+		#dma-cells = <1>;
+		interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clkc 15>;
+	};
+
+	axi_pwm_gen: pwm@44a60000 {
+		compatible = "adi,axi-pwmgen-2.00.a";
+		reg = <0x44a60000 0x1000>;
+		label = "adaq2387x_if";
+		#pwm-cells = <2>;
+		clocks = <&clkc 15>, <&ext_clk>;
+		clock-names = "axi", "ext";
+	};
+};
+
+/* The FMC FRU EEPROM on this card is a 24AA32A, not the carrier's default. */
+&eeprom1 {
+	compatible = "atmel,24c32";
+};