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| ADI_APOLLO_NCO_PROFILE_PHASE_INCREMENT, | ||
| index, &ftw_u32, 1); | ||
| ret = ad9088_check_apollo_error(&phy->spi->dev, ret, | ||
| "adi_apollo_cnco_profile_load"); |
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The above handling is very annoying 😄. Not related to the current PR and just something I'm sharing if you ever want to change it. In navassa, I added this exactly to avoid handling like the above.
| const struct _ad9088_ffh *ffh; | ||
| u8 t, i; | ||
|
|
||
| for (t = 0; t < ARRAY_SIZE(phy->ffh.dir); t++) { |
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nowadays you can do for (u8 t = 0; ...) in the kernel
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The example maps adi,gpio-hop-block onto GPIO17/18, which are also the FFT sniffer exports. Move the block select to GPIO24-26. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
GPIO quick configuration profile to apply. Explicit GPIO mappings override the quick configuration mapped pins. Example usage: adi,gpio-quick-config = <ADI_APOLLO_QUICK_CFG_PROFILE_2>; Signed-off-by: Jorge Marques <jorge.marques@analog.com>
The device_property_count_u32() length was being overwritten by the device_property_read_u32_array() return value, which is also not the number of read elements on success. Keep the length in an auxiliary variable, read the minimum between the number of elements in the devicetree and the requested, and return it. Fewer elements in the devicetree means setting the remaining elements as ADI_APOLLO_GPIO_HOP_IDX_NONE (-1). In some systems, not all gpios can be fully routed. Fixes: 86f4acb ("iio: trx-rf: ad9088: Add initial FFH support") Signed-off-by: Jorge Marques <jorge.marques@analog.com>
The val is unsigned, negative value never occur. Fixes: 86f4acb ("iio: trx-rf: ad9088: Add initial FFH support") Signed-off-by: Jorge Marques <jorge.marques@analog.com>
The AD9084 has 8 GPIO profiles predefined, expose this functionality by reading the devicetree property 'adi,gpio-quick-config'. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
phy->ffh.dir[dir].fnco.select[] is stored incremented by 1, with 0 meaning "not selected". For printing back, cast to int to yield -1 as "not selected". Fixes: 86f4acb ("iio: trx-rf: ad9088: Add initial FFH support") Signed-off-by: Jorge Marques <jorge.marques@analog.com>
adi_apollo_fnco_hop_pgm() misused ADI_APOLLO_CNCO_ALL instead of ADI_APOLLO_FNCO_ALL. Fixes: 86f4acb ("iio: trx-rf: ad9088: Add initial FFH support") Signed-off-by: Jorge Marques <jorge.marques@analog.com>
The FFH state arrays are sized by the number of controllers, but were indexed with the per-side map->fddc_num/cddc_num, aliasing side A onto side B. Add ad9088_ffh_fnco_num()/ad9088_ffh_cnco_num() to compute the absolute controller number. The define values for ADI_APOLLO_CNCO_NUM, ADI_APOLLO_FNCO_NUM are already across both sides for 8T8R, but were multiplied by ADI_APOLLO_NUM_SIDES again, doubling the allocated space. The mode is sized by the number of controllers, not the number of hop profiles, and the frequencies are stored per profile per controller, instead of one set of frequencies for all controllers. FFH_FNCO_FREQUENCY, FFH_FNCO_SELECT and FFH_FNCO_MODE computed the hop-enable mask for a single FNCO controller with GENMASK(fnco_num + 1, fnco_num), which set 2 neighbor controllers instead of 1. The CNCO was already using BIT correctly. FFH_FNCO_FREQUENCY also restored the FNCO hop-enable state from en[index], with index the hop profile (0-31), while en[] is indexed by controller number. Fixes: 86f4acb ("iio: trx-rf: ad9088: Add initial FFH support") Signed-off-by: Jorge Marques <jorge.marques@analog.com>
fnco_hop_config and cnco_hop_config were partially assigned, so adi_apollo_fnco_hop_pgm() and adi_apollo_cnco_hop_enable(), remaining fields were undefined. Hop on frequency only, auto hop incrementing up to the last profile, and let the CNCO load the initial profile to start hopping from. Load the frequency with adi_apollo_fnco_chan_pgm(), which programs the channel NCO of a profile, instead of adi_apollo_fnco_profile_load(), and check the return of the hop enable restore. Fixes: 86f4acb ("iio: trx-rf: ad9088: Add initial FFH support") Signed-off-by: Jorge Marques <jorge.marques@analog.com>
Switching a controller into a GPIO profile select mode requires handing the block select over to the GPIOs, but the block select is chip global, while the mode is per controller. Add ad9088_ffh_gpio_hop_enter()/exit() and only hand the block select back to SPI once the last FNCO or CNCO of either terminal left GPIO hop mode, tracked with ad9088_ffh_gpio_active(). Use adi_apollo_fnco_profile_sel_mode_set() to preserve per-controller GPIOSHARE bit and, since adi_apollo_fnco_hop_pgm() pulses HOP_CTRL_INIT, clearing the hop profiles. Drop the GPIO mask calculation from both select handlers, which only printed the masks and did not configure anything. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
At ad9088_ffh.c, update return paths to use ad9088_check_apollo_error() instead of returning a generic error code or message. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
adi_apollo_gpio_quick_config_mode_set(0) resets the stage select of every GPIO and drops the quick config preset applied at probe. The sniffer only needs its own pin, and adi_apollo_gpio_cmos_func_mode_set() already sets it to functional stage. Also check the return value. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
Each GPIO is muxed to a single function, so a second mapping silently overrides the first. The ADF4382 clock align GPIOs are a problem in particular: MCS tracking keeps strobing them in the background, after the initial calibration. Claim every GPIO mapped in the devicetree and fail the probe on overlap: the clock align GPIOs when MCS runs (ADF4030 and ADF4382 present), the FFT sniffer exports, the adi,gpio-hop-* pins and adi,gpio-exports. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
The index is type uint8_t while IDX_NONE takes value -1, causing the check to never execute. Cast to same type to force into value 255. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
Fix parameter order, where buf_size was expected before timeout_us, but was being called as the last argument. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
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On the VCK190 and VPK180, map the FFH hop word to GPIO17-30. Block select uses 3 bits, since only FNCO and CNCO are selected; GPIO15/16 stay with the ADF4382 clock align and GPIO31 is not routed by the FPGA. Skip the quick config preset, since it would map profile_fcn_sel[3] to the floating GPIO31. For the vpk180, comment-out gpio-exports, to not collide the used gpio. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
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