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The design pinned every lock id by hand, in tables that left gaps for the lock ids an ObjectFifo takes. A reader had to know which ids were free to read the tables. A kernel takes a lock id as a compile-time constant, so the design must still pin every lock a kernel names. It now pins them from 0 up, which is the id the lowering would pick anyway, and `_lock_ids` derives each table from the order the design declares its locks. No lock id is written by hand. Every other lock takes `lock_id=None`, so `--aie-assign-lock-ids` picks it: the projection and attention memtiles, the per-layer-input merge tile, and the locks that the kernels gave up in Xilinx/mlir-aie#3912. The design emits those acquires and releases from its Worker bodies instead. The runtime sequence sets each RTP barrier through `Lock.set`, so it no longer writes `0x1F000 + 16 * id` by hand. 105 of the design's 259 locks now take a compiler-assigned id, up from 53 of 261.
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The decode layer's design pinned every lock id by hand. Its tables left gaps
for the ids an ObjectFifo takes, so a reader had to know which ids were free
to read them.
This PR removes every hand-written lock id. It pairs with
Xilinx/mlir-aie#3912, which gives up the locks the kernels used to take.
What the compiler can and cannot assign
A
flm_gemma4_decode_*kernel takes a lock id as a compile-time constant,through a
-DFLM_GEMMA4_DECODE_<STEM>_<NAME>flag. The id must exist beforethe kernel object compiles, which is before
--aie-assign-lock-idsruns. Thedesign therefore still pins every lock a kernel names.
It now pins them from 0 up, in the order it declares them, which is the id
the pass would pick anyway.
_lock_idsbuilds each table from that order, sono table holds a number any more. Two ids come from a neighbouring tile's
table, because the kernel reaches across the tile boundary for them.
Every other lock takes
lock_id=Noneand the pass picks it: both projectiongather memtiles, the projection weight and x memtiles, the attention memtile,
the per-layer-input merge tile, and the locks the kernels give up in
mlir-aie#3912. The design emits those acquires and releases from its Worker
bodies, against the
aie.lockSSA value.The runtime sequence sets each RTP barrier with
Lock.set, so it no longercomputes
0x1F000 + 16 * id.105 of the design's 259 locks now take a compiler-assigned id, up from 53 of
261. The rest are named by a kernel that takes them inside a loop or an
RTP-dependent branch.
Merge order
This PR needs a mlir-aie that contains Xilinx/mlir-aie#3912. That has to
merge first and ship in a wheel; this PR then bumps
mlir_aieinrequirements.txtto that version in the same change. It stays a draft untilthen.
develkeeps working in the meantime, because it pins an exactmlir_aieversion and does not pick the new kernels up on its own.Validation
pytest iron/operators/flm/layer/test.pyon an NPU2 (Strix) gives 38 passed,1 skipped, against a local mlir-aie checkout carrying #3912. That covers both
geometries, all four layer types, and the context lengths that put a
sliding-window layer before, at and after its ring wrap. The skip is the
captured dispatch case, which needs
FLM_LAYER_CASES.The suite does catch a wrong lock id: it shows up as
ERT_CMD_STATE_TIMEOUTor as a relative-L2 assert. Removing all the ids at once, before the kernels
gave theirs up, deadlocked exactly that way.
test_matches_referencealso runs_check_rtps, so each RTP buffer stilllands at the address the engine writes.