Elementwise add/mul, RoPE, SiLU kernels inherit floor rounding — ~0.7% bias at large magnitudes #180

Severity: MEDIUM-HIGH — silent systematic bias, no error.

The aie_kernels elementwise kernels (generic add.cc, mul.cc, rope.cc; aie2/ + aie2p/ silu.cc) perform their final rounding with whatever mode the hardware was last set to. On the fused dispatch path a prior kernel can leave floor active, biasing large-magnitude results by ~0.7% (e.g. isolated add: max dev 0.25 at |~33|, systematic sign-dependent).

Root cause

No ::aie::set_rounding(aie::rounding_mode::conv_even) at kernel entry — rounding mode is global NPU state, not per-kernel.

Fix (committed in 76eee2a)

Explicit conv_even at entry of add.cc, mul.cc, rope.cc, silu.cc. Isolated add: bias 0.25 → 0.0000; operator tests 27/27 + 17/17 pass; llama prefill bit-identical across runs.

Regression coverage

• iron/operators/ elementwise/silu/rope tests (rounding-sensitive cases)
• llama-3.2-1B prefill determinism (bit-identical logits)

Related: mlir-aie #3481 (rounding-mode convention).