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Optimize FP64 fabs on GPUs with low FP64 performance - #12294
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- sign and payload are implementation defined on device
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Regarding
This is what we report in the CUDA prog guide https://docs.nvidia.com/cuda/cuda-programming-guide/05-appendices/mathematical-functions.html#cuda-and-c-c-compliance
This gives you the freedom to explore the fastest implementation without being 100% IEEE754 compliant |
- update comments - check sign of fabs(-0.0) in new test case - add fabs benchmark (adopted from isnan benchmark)
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@fbusato Thanks, I relaxed the new NaN tests accordingly |
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Important Review skippedReview was skipped as selected files did not have any reviewable changes.
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| Layer / File(s) | Summary |
|---|---|
Integer-based fabs dispatch libcudacxx/include/cuda/std/__cmath/abs.h |
The helper clears the sign bit of a double using integer operations. Runtime calls use this path on slow-FP64 targets; constant evaluation and other targets retain the existing paths. |
Runtime correctness checks libcudacxx/test/libcudacxx/std/numerics/c.math/fp_abs.pass.cpp |
Runtime checks cover quiet and signaling NaNs with varied signs and payloads, and verify that fabs(-0.0) has no sign bit. |
CUDA fabs benchmark libcudacxx/benchmarks/bench/fabs/basic.cu |
The benchmark applies cuda::std::fabs to a double, combines the result storage with rotated input storage, and configures its launch from occupancy and device SM count. |
Possibly related issues
- NVIDIA/cccl issue 11894 requests integer-path optimizations for double-precision
<cmath>functions, includingfabs. This change adds an integer path for doublefabs.
Suggested reviewers: miscco, davebayer
Change: Refactor
Merge Risk: 
Minimal · previous review 0133a
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No actionable issue remains; this change is mergeable after normal checks.
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/ok to test 56ecf2d |
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/sass diff ok 56ecf2d |
🥳 CI Workflow Results🟩 Finished in 3h 05m: Pass: 100%/230 | Total: 6d 05h | Max: 3h 04m | Hits: 41%/2276764See results here. |
Description
closes
Part of #11894
Follow up to #12231
fabsfordoublecompiles toDADDwhich is slow on GPUs with low FP64 throughput -> use integer instructions instead__fp64_fabs_intuses integer instructions to clear the sign bit, while conforming to IEEE754 NaN handlingNote: I first tried a mask approach which worked perfectly fine on my machine (sm_87) but the compiler recognized every form of clearing the sign bit as
fabson targets SM100+ ->DADDClearing the high 32-bit half with
__double2hiint/__hiloint2doubleavoids thatThe issue points out that NaNs need careful treatment for fabs. The integer path conforms to IEEE754abs, so only the sign bit is cleared, NaN payloads are preserved and sNaNs are not quieted. This matches the host and comp-time eval and the existing test, which asserts!signbit(fabs(-NaN)).On main,
fabsis not consistent. At runtime,fabsis compiled toDADD, which keeps the sign of the NaN and quiets sNaNs. The existing test only passed because its input was folded.I'd need guidance on which behaviour is preferred here! @fbusato
Benchmarks:
Micro benchmarks:
Down stream benchmarks in CUB:
The changes in this PR alone produce results within noise of main.
More interesting is the combination of this PR with #12231
To reproduce the results, use this branch
The table above shows the results for the int32 offsets, int64 is similar.
Checklist