[TRTLLM-16980][feat] modeling_v2: GLM-5.2-NVFP4 sm_103 tep4 target by erictsai-nv · Pull Request #20662 · NVIDIA/TensorRT-LLM

erictsai-nv · 2026-10-20T05:52:34Z

Description

This PR adds a modeling_v2 target for GLM-5.2-NVFP4 on sm_103. The target runs at tep4: 4 ranks, tensor-parallel attention and expert-parallel MoE. It ports an existing CuTe DSL implementation of the model into the modeling_v2 layout.

Routing

models/glm_moe_dsa/routing.py claims a deployment when all of these hold:

Compute capability is (10, 3).
The checkpoint config has the GLM-5.2 shape: 78 layers, hidden size 6144, 256 routed experts, q_lora_rank 2048, 32 indexer heads.
The mapping is tep4: world size 4, TP 4, PP 1, MoE EP 4, MoE TP 1, no attention DP.
The KV cache is FP8, as the checkpoint declares.
Speculative decoding is off, or one-model MTP-Eagle with one draft token.

MTP support matches the scope of the original implementation: one-model MTP-Eagle with max_draft_len 1 only. Its decode attention handles at most 2 query rows per sequence. For other draft lengths, routing raises NoTarget. In require mode the engine reports that error. In auto mode it falls back to the built-in model.

Changes by area

Target models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/.
- modeling.py and weights.py: the forward, including the checkpoint's MTP layer (layer 78).
- ops/: 39 OpWrapper entries. Attention 17, MoE 8, GEMM 6, comm 3, norm 2, quantization 1, activation 1, embedding 1. The comm entries are a Lamport all-reduce, alone and fused with add + RMSNorm or an NVFP4 quantize.
- kernels/: the CuTe DSL sources the entries launch, one subdirectory per ops/ category plus common/.
- Engine limits are handled up front. The sparse-MLA decode kernel is compiled for max_batch_size. Inputs above a kernel's row limit run in chunks or use the built-in op.
Routing. A tep4 branch in models/glm_moe_dsa/routing.py, beside the sm_107 tp16 one.
Tests. One unit test file per entry, a 4-rank comm matrix, and GLM routing cases. The accuracy test test_gsm8k_identity_vs_mtp1_and_acceptance runs GSM8K without MTP and with MTP1 in one session, and checks MTP1 acceptance length against an anchor measured on the built-in model. l0_b300.yml runs the single-GPU unit tests in pre-merge. l0_dgx_b300.yml runs the comm matrix in pre-merge and the accuracy test in post-merge. gsm8k.yaml gains a GLM-5.2 NVFP4 row without speculation, and acceptance_length.yaml an anchor for this target's MTP1.
Shared files. Five GLM-5.2 cells in the fp4_quantize test's TARGET_CELLS. comm/_rank_job.py: run() takes an optional directory. README.

Test Coverage

Each run uses 4 GPUs with TP 4 and EP 4. The baseline is the built-in model (modeling_v2="off") on the same engine settings.

Throughput (ISL/OSL 1024, MTP1): output tok/s change against the mean of two baseline runs in the same job, one before and one after this target.

Concurrency	1	2	4	8	16	32
B300	+20.6%	+21.2%	+19.4%	+21.1%	+27.1%	+30.3%
GB300	+30.9%	+26.4%	+23.7%	+26.5%	+32.1%	+38.2%

TPOT falls 15–23% on B300 and 17–26% on GB300. TTFT falls 47–62% and 50–64%.

Accuracy and tests

GSM8K with MTP1: built-in 94.69, this target 94.05 on B300; built-in 93.97, this target 94.05 on GB300.
test_gsm8k_identity_vs_mtp1_and_acceptance passes on B300: GSM8K 94.28 without MTP and 93.97 with MTP1. The MTP1 acceptance length is 1.943, against 1.942 on the built-in model.
MMLU on B300, MTP1: built-in 87.82, this target 87.62.
Long prompts (max_seq_len 40960): three ~19k-token needle prompts pass 3/3 in 4 of 4 B300 runs and 10 of 11 GB300 runs.
MTP acceptance at long context: on the InferenceX AgentX traces (prompts up to 256k tokens) at concurrency 32, this target accepts 79.0% of drafts and the built-in model 78.7%. An earlier version used the NeoX RoPE layout in the indexer and reached 37.8%. Short prompts cannot show this, so this check covers it.
Unit tests on B300: all 406 GLM entry tests, the catalog fp4_quantize test, and the 4-rank comm matrix pass.

PR Checklist

Please review the following before submitting your PR:

PR description clearly explains what and why. If using CodeRabbit's summary, please make sure it makes sense.
PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.
Test cases are provided for new code paths (see test instructions)
If PR introduces API changes, an appropriate PR label is added - either api-compatible or api-breaking. For api-breaking, include BREAKING in the PR title.
Any new dependencies have been scanned for license and vulnerabilities
CODEOWNERS updated if ownership changes
Documentation updated as needed
Update tava architecture diagram if there is a significant design change in PR.
The reviewers assigned automatically/manually are appropriate for the PR.
Please check this after reviewing the above items as appropriate for this PR.

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Dev Engineer Review

Adds the GLM-5.2-NVFP4 sm_103 TEP4 modeling_v2 target with TP4 attention, EP4 MoE, FP8 KV cache, routing, weights, MTP layer 78, engine limits, and 39 operation wrappers.
Adds extensive SM103 CuTe DSL kernels for attention, GEMM, MoE routing, quantization, normalization, embedding, communication, and scheduling. Validate tensor layouts, shapes, alignment, devices, row limits, PDL modes, and specialization compatibility.
Updates routing to accept only the specified compute capability, model dimensions, parallel mapping, KV-cache mode, and no-speculation or one-token MTP-Eagle configurations. Unsupported configurations return NoTarget.
Updates FP4 quantization catalog coverage and adds target-specific operation and projection dispatch infrastructure.
Adds TP4 Lamport all-reduce support and configurable communication test launch paths.
Main risk areas are the large new CUDA surface, PDL synchronization, custom FP8/NVFP4 conversion, cache addressing, split-K reductions, and dynamic schedule selection. Review severity counts are unavailable from the supplied findings.
Reported performance and accuracy measurements predate later kernel cleanup and RoPE changes. Revalidate those measurements before relying on them for release decisions.

QA Engineer Review

Adds extensive SM103 unit coverage under tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/ for activation, attention, GEMM, MoE, normalization, embedding, quantization, and communication.
Tests cover certified cells, reference agreement, output and input-buffer safety, alignment and layout guards, unsupported row counts, specialization mismatches, invalid cache and routing metadata, PDL-related paths, and TP4 four-rank all-reduce behavior.
Adds GLM routing tests for supported deployments and rejection under auto and require, including unsupported speculation, model dimensions, attention DP, SM100, and non-FP8 KV cache.
Adds GSM8K identity-versus-MTP1 and MTP1 acceptance integration tests. Adds acceptance-length and GSM8K reference data.
Updates tests/integration/test_lists/test-db/l0_dgx_b300.yml with GLM identity, MTP acceptance, and four-rank communication entries. The changed integration tests are therefore listed in CI.
Reported results include 406 GLM entry tests, the FP4 catalog test, and the four-rank communication matrix passing on B300. Long-prompt tests passed in 4/4 B300 runs and 10/11 GB300 runs. These results are author-reported, and the long-prompt gap requires follow-up.
Coverage verdict: needs follow-up because reported measurements predate kernel and RoPE changes, and one GB300 long-prompt run failed.
Per-file QA perspective: Source files under models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/ add new target-specific kernels, wrappers, schedules, weight loading, and APIs. Verify all supported and rejected configurations on SM103, including decode, prefill, MTP, FP8 KV cache, EP4 routing, PDL, and four-rank communication.
Per-file QA perspective: models/glm_moe_dsa/routing.py changes target selection behavior. Verify exact matching, NoTarget behavior, and require diagnostics for every unsupported configuration.
Per-file QA perspective: _router_index.py registers GlmMoeDsaForCausalLM. Verify architecture discovery and routing integration.
Per-file QA perspective: catalog/quantization/fp4_quantize.py adds GLM-5.2 FP4 cells. Verify catalog dispatch and output layout against the stock quantizer.
Per-file QA perspective: _rank_job.py adds an optional launcher directory. Verify default resolution and explicit-directory resolution.
Per-file QA perspective: README.md documents kernel layout, coverage, and test naming. Verify the documented paths and certification status match the repository.
Per-file QA perspective: tests/integration/defs/accuracy/modeling_v2/test_glm_moe_dsa.py adds GSM8K and MTP acceptance gates. Verify both modeling_v2 and stock comparison legs and the configured thresholds.
Per-file QA perspective: tests/integration/defs/accuracy/references/acceptance_length.yaml and gsm8k.yaml add GLM reference thresholds. Verify checkpoint, hardware, decoding mode, and threshold provenance.
Per-file QA perspective: tests/integration/test_lists/test-db/l0_dgx_b300.yml adds CI entries for accuracy and communication. Verify selectors, required device count, and post-merge versus pre-merge placement.
Per-file QA perspective: All changed operation test files compare kernels with references and exercise error paths. They are not individually repeated in the integration test list; they are collected through the modeling_v2 test discovery and should be verified in the applicable CI job.

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Changes

The pull request adds a GLM-5.2 NVFP4 sm_103 TEP4 target to modeling_v2. It adds routing, a weights loader, CuTe DSL kernels, op wrappers, unit tests, integration accuracy tests, and README updates. I did not produce a reliable layer table.

Priority: Normal

Estimated code review effort: 5 (Critical) | ~120 minutes

Merge Risk: Low · previous review f3c25

This change adds a new opt-in GLM-5.2 sm_103 target that falls back to the built-in model when the deployment does not match. The default production paths reviewed here show no confirmed failure. The top-k kernel accepts unsafe non-default radix settings that should be rejected, and one new test should skip rather than fail on unsupported hardware. The remaining comments are small cleanups. The change is mergeable once these are addressed or accepted as follow-up.

Pre-merge checks: 4

Check name	Status	Explanation
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Linked Issues check		Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check		Check skipped because no linked issues were found for this pull request.
Description check		The pull request description follows the required structure. It clearly explains the objective, routing scope, implementation areas, test coverage, performance and accuracy results, and checklist stat…

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Review comments at
@tensorrt_llm/_torch/_experimental/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/kernels/attention/self_attn_indexer_topk_prefill.py:
- Around line 118-121: In the initializer containing coarse_radix_bits, radix,
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Review comments at
@tensorrt_llm/_torch/_experimental/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/kernels/gemm/moe_prefill_shared_splitk.py:
- Around line 595-604: Update the ValueError messages in the validation checks
for physical_m, tile_n, split_k, and output_alignment to add spaces between “be”
and the numeric values and after commas, preserving the existing validation
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Review comments at
@tensorrt_llm/_torch/_experimental/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/kernels/quantization/moe_prefill_quantize_segmented.py:
- Around line 234-237: Correct the spacing in the user-facing validation
messages: update the ValueError text for threads and segments in the validation
logic, and the segmented alignment error near the corresponding alignment check,
to use “or 512”, “or 6”, and “requires 16-byte”. Also fix the matching
“require16-byte” typo in the module docstring.

Review comments at
@tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/attention/test_modeling_v2_cute_dsl_fp8_paged_mqa_logits.py:
- Line 19: Replace the module-level CUDA assert with a pytest module skip that
permits collection to continue, gating on both CUDA availability and
SM100-family capability via torch.cuda.get_device_capability()[0] == 10. Place
the guard before the tensorrt_llm imports and add the necessary E402
annotations, matching the sibling CuTe DSL test pattern.

Review comments at
@tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/moe/test_modeling_v2_noaux_tc_op.py:
- Line 63: Seed the logits generation in test_the_bias_steers_but_does_not_weigh
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tensorrt_llm/_torch/_experimental/modeling_v2/README.md
tensorrt_llm/_torch/_experimental/modeling_v2/_router_index.py
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tensorrt_llm/_torch/_experimental/modeling_v2/models/glm_moe_dsa/__init__.py
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tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/moe/test_modeling_v2_cute_dsl_moe_routing.py
tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/moe/test_modeling_v2_cute_dsl_moe_topk_routing.py
tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/moe/test_modeling_v2_cute_dsl_moe_zero.py
tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/moe/test_modeling_v2_cute_dsl_mtp_moe_experts.py
tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/moe/test_modeling_v2_noaux_tc_op.py
tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/norm/__init__.py
tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/norm/test_modeling_v2_cute_dsl_mtp_norm_shard.py
tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/norm/test_modeling_v2_cute_dsl_qkv_a_rmsnorm.py
tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/quantization/__init__.py
tests/unittest/_torch/modeling_v2/models/glm_moe_dsa/glm_5_2_nvfp4__sm_103__tep4/quantization/test_modeling_v2_cute_dsl_moe_quantize_nvfp4.py
tests/unittest/_torch/modeling_v2/test_modeling_v2_routing.py

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Signed-off-by: Eric Tsai <ertsai@nvidia.com>

erictsai-nv · 2026-10-21T08:19:59Z

/bot run

tensorrt-cicd · 2026-10-21T08:27:42Z

PR_Github #79593 [ run ] triggered by Bot. Commit: 08330cc Link to invocation

tensorrt-cicd · 2026-10-21T19:18:09Z

PR_Github #79593 [ run ] completed with state SUCCESS. Commit: 08330cc
/LLM/main/L0_MergeRequest_PR pipeline #65536 completed with status: 'FAILURE'

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erictsai-nv · 2026-10-22T01:59:06Z

/bot run --disable-fail-fast

tensorrt-cicd · 2026-10-22T02:06:02Z

PR_Github #79746 [ run ] triggered by Bot. Commit: 08330cc Link to invocation

tensorrt-cicd · 2026-10-22T07:18:29Z

PR_Github #79746 [ run ] completed with state FAILURE. Commit: 08330cc
/LLM/main/L0_MergeRequest_PR pipeline #65652 completed with status: 'UNSTABLE'

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github-actions · 2026-10-22T09:56:21Z

Automatically added "ci: full pre-merge approved" because this PR has satisfied the required GitHub review approvals. Unresolved review conversations and other required checks remain independent merge requirements.

Signed-off-by: Eric Tsai <ertsai@nvidia.com>

tensorrt-cicd · 2026-10-22T10:26:56Z

PR_Github #79879 [ run ] triggered by Bot. Commit: 1dc8642 Link to invocation

erictsai-nv · 2026-10-23T02:30:48Z

/bot kill

tensorrt-cicd · 2026-10-23T02:36:53Z

PR_Github #80028 [ kill ] triggered by Bot. Commit: 1dc8642 Link to invocation

tensorrt-cicd · 2026-10-23T02:40:05Z

PR_Github #79879 [ run ] completed with state ABORTED. Commit: 1dc8642

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tensorrt-cicd · 2026-10-23T02:40:17Z

PR_Github #80028 [ kill ] completed with state SUCCESS. Commit: 1dc8642
Successfully killed previous jobs for commit 1dc8642

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erictsai-nv · 2026-10-23T02:44:14Z

/bot run --disable-fail-fast

tensorrt-cicd · 2026-10-23T02:52:06Z

PR_Github #80030 [ run ] triggered by Bot. Commit: 1dc8642 Link to invocation

tensorrt-cicd · 2026-10-23T06:36:51Z

PR_Github #80030 [ run ] completed with state FAILURE. Commit: 1dc8642
/LLM/main/L0_MergeRequest_PR pipeline #65864 completed with status: 'FAILURE'

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⚠️ Resource Maintenance — Test Coverage Reduced:

Resource maintenance in LLM/main/L0_Test-x86_64-Multi-GPU #2984: B200 multi-GPU stages are paused to relieve the CI queue backlog (109 running / 459 pending on 2026-10-22). Owner: @sharabeshj-nvda. The CI team decides when to lift it.
Affected stages:
DGX_B200-2_GPUs-PyTorch-1
DGX_B200-4_GPUs-PyTorch-1
DGX_B200-4_GPUs-PyTorch-2
DGX_B200-4_GPUs-PyTorch-3
DGX_B200-4_GPUs-PyTorch-Ray-1
DGX_B200-8_GPUs-PyTorch-1
DGX_B200-8_GPUs-PyTorch-2
DGX_B200-8_GPUs-PyTorch-3
DGX_B200-8_GPUs-PyTorch-4
DGX_B200-8_GPUs-PyTorch-Ray-1

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Signed-off-by: Eric Tsai <ertsai@nvidia.com> # Conflicts: # tensorrt_llm/_torch/_experimental/modeling_v2/_router_index.py # tensorrt_llm/_torch/_experimental/modeling_v2/models/glm_moe_dsa/__init__.py # tensorrt_llm/_torch/_experimental/modeling_v2/models/glm_moe_dsa/routing.py # tests/integration/defs/accuracy/modeling_v2/test_glm_moe_dsa.py # tests/integration/defs/accuracy/references/acceptance_length.yaml # tests/unittest/_torch/modeling_v2/test_modeling_v2_routing.py

erictsai-nv · 2026-10-27T03:09:32Z

/bot run --disable-fail-fast --extra-stage "DGX_B300-4_GPUs-PyTorch-Post-Merge-1, DGX_B300-4_GPUs-PyTorch-Post-Merge-2"

tensorrt-cicd · 2026-10-27T03:16:45Z

PR_Github #80777 [ run ] triggered by Bot. Commit: ad12743 Link to invocation

tensorrt-cicd · 2026-10-27T11:44:15Z

PR_Github #80777 [ run ] completed with state SUCCESS. Commit: ad12743
/LLM/main/L0_MergeRequest_PR pipeline #66517 completed with status: 'FAILURE'

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Signed-off-by: Eric Tsai <ertsai@nvidia.com> # Conflicts: # tensorrt_llm/_torch/_experimental/modeling_v2/catalog/quantization/fp4_quantize.py

erictsai-nv · 2026-10-28T02:38:46Z

/bot run --disable-fail-fast

tensorrt-cicd · 2026-10-28T02:46:07Z

PR_Github #81037 [ run ] triggered by Bot. Commit: 145fd28 Link to invocation

tensorrt-cicd · 2026-10-28T10:21:52Z

PR_Github #81037 [ run ] completed with state SUCCESS. Commit: 145fd28
/LLM/main/L0_MergeRequest_PR pipeline #66756 completed with status: 'SUCCESS'

CI Report

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Signed-off-by: Eric Tsai <ertsai@nvidia.com> # Conflicts: # tensorrt_llm/_torch/_experimental/modeling_v2/README.md # tests/integration/test_lists/test-db/l0_b300.yml # tests/unittest/_torch/modeling_v2/comm/_rank_job.py

erictsai-nv · 2026-10-29T01:56:04Z

/bot reuse-pipeline

tensorrt-cicd · 2026-10-29T02:05:26Z

PR_Github #81295 [ reuse-pipeline ] triggered by Bot. Commit: 2e4b628 Link to invocation

tensorrt-cicd · 2026-10-29T02:28:58Z

PR_Github #81295 [ reuse-pipeline ] completed with state SUCCESS. Commit: 2e4b628
Reusing PR_Github #81037 for commit 2e4b628

Link to invocation

…ownership rules Main now routes sm_103 tep4 to glm_5_2_nvfp4__sm_103__tep4 (NVIDIA#20662), and its claims suite no longer lets a target import a family-level shared package. - The sm_103 low-latency target serves only the layout its fast paths were built for: attention and experts tensor-parallel over eight ranks (tp8). It is renamed glm_5_2_nvfp4__sm_103__tp8 (ModelingV2Glm52Nvfp4Sm103Tp8); the tep and dep layouts, their path sets and the dep cells are removed. - glm_moe_dsa/shared moves into the target directory: its modules beside modeling.py, its kernel packages beside the target's routed-MoE ones under kernels/. Relative imports are rewritten for the new locations. - routing.py keeps main's tp16 and tep4 branches and adds the tp8 branch. - The accuracy gate is TestModelingV2Glm52Nvfp4Sm103Tp8::test_gsm8k_tp8; the tep4 and dep8 cases and their test-list entries are removed. Signed-off-by: Xiao Wang <24860335+xwang233@users.noreply.github.com>

github-actions Bot assigned erictsai-nv Oct 20, 2026

erictsai-nv force-pushed the glm52-tep4-modeling-v2 branch from 6fb5e0c to f3c2532 Compare October 20, 2026 06:26

erictsai-nv marked this pull request as ready for review October 20, 2026 06:32

erictsai-nv requested review from a team, Wanli-Jiang, WeiHaocheng and litaotju as code owners October 20, 2026 06:32

erictsai-nv requested review from EmmaQiaoCh, ZhanruiSunCh and brnguyen2 October 20, 2026 06:32

coderabbitai Bot reviewed Oct 20, 2026

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Wanli-Jiang reviewed Oct 21, 2026

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Comment thread tests/integration/test_lists/test-db/l0_dgx_b300.yml Resolved

Wanli-Jiang reviewed Oct 21, 2026

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Comment thread tests/integration/test_lists/test-db/l0_dgx_b300.yml Resolved

Wanli-Jiang approved these changes Oct 21, 2026

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[TRTLLM-16980][feat] modeling_v2: GLM-5.2-NVFP4 sm_103 tep4 target

08330cc

Signed-off-by: Eric Tsai <ertsai@nvidia.com>

erictsai-nv force-pushed the glm52-tep4-modeling-v2 branch from f3c2532 to 08330cc Compare October 21, 2026 07:37

chzblych approved these changes Oct 22, 2026

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Comment thread tests/integration/test_lists/test-db/l0_dgx_b300.yml Resolved

trtllm-agent added the ci: full pre-merge approved label Oct 22, 2026

[TRTLLM-16980][test] Lower the GLM-5.2 accuracy test timeout to 45 min

1dc8642

Signed-off-by: Eric Tsai <ertsai@nvidia.com>

erictsai-nv requested review from Tabrizian, dongfengy and xwang233 as code owners October 27, 2026 03:01

Merge remote-tracking branch 'upstream/main' into glm52-tep4-modeling-v2

145fd28

Signed-off-by: Eric Tsai <ertsai@nvidia.com> # Conflicts: # tensorrt_llm/_torch/_experimental/modeling_v2/catalog/quantization/fp4_quantize.py

erictsai-nv merged commit 592bd6f into NVIDIA:main Oct 29, 2026
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xwang233 mentioned this pull request Oct 29, 2026

[TRTLLM-17096][feat] modeling_v2: GLM-5.2 NVFP4 low-latency decode target for GB300 #20524

Merged

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lijingticy22 mentioned this pull request Nov 5, 2026

[None][perf] modeling_v2 GLM-5.2 NVFP4 sm_103 tep4: faster prefill and decode, MTP3 / MTP5, long-context decode #21695

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