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… kernels oneshotAllreduceFusionKernel and rmsNormLamport used LamportFlags' cluster arrival, in which every thread arrives on the cluster barrier but only cluster rank 0's first warp waits, and then arrived on the cluster barrier again in the RMSNorm epilogue's cluster reduction. Each thread must arrive and wait once per phase: a second arrival counted toward the first phase lets the reduction read a peer CTA's partial sum before it is written, and counts the cluster in before a late CTA has read the buffer flags. Both kernels now count arrivals per CTA, as the attn_res kernel already does; their cluster barrier is left to the reduction. Signed-off-by: Vasanth Sabavat <vsabavat@nvidia.com>
…luster reduction writes The RESIDUAL_RMS_NORM epilogues of oneshotAllreduceFusionKernel and rmsNormLamport write each CTA's partial sum into the other CTAs' shared memory through the cluster mapping before any cluster barrier wait, so a target CTA may not have started yet; racecheck reports every such write once the kernels' arrival counting no longer stalls it. A cluster.sync() before the writes makes every CTA of the cluster start first, as the attn_res kernel's early arrive / wait does. Signed-off-by: Vasanth Sabavat <vsabavat@nvidia.com>
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Included review availability: This review used your included allowance. Your plan provides up to 12 included reviews per hour; 10 remain after this review. WalkthroughLamportFlags now uses CTA arrival counting for all configurations. The one-shot and CGA RMSNorm kernels synchronize the cluster before CTAs write block sums to peer shared memory. The two-shot kernel also uses the updated LamportFlags template. ChangesLamport Synchronization
Priority: ⬇️ Low Estimated code review effort: 2 (Simple) | ~10 minutes Change: Bug fix Suggested reviewers: Merge Risk: 🟡 Moderate · up to The added cluster synchronization has an unresolved participation risk for padded launches. Verify or correct that path before merging unless the risk is explicitly accepted. 🚥 Pre-merge checks | ✅ 3 | ❌ 2❌ Failed checks (2 warnings)
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Full details: Docstring CoverageExplanation Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%. Docstring coverage is scoped to functions touched by this diff. Analyzed 4 functions across 1 files. (1 skipped: 1 unsupported.) Full details: Description checkExplanation The description explains the synchronization fixes and provides detailed test results, but its checklist says there is no API change even though the PR removes the UseCGA template parameter from LamportFlags.
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Review comments at
@cpp/tensorrt_llm/kernels/communicationKernels/mnnvlAllreduceKernels.cu:
- Line 715: Update the kernel’s padded-thread control flow around cluster.sync()
so padded threads do not return before either cluster collective. Keep both
barriers reachable by every thread in the cluster, and guard only the data
accesses that padded threads must skip.
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| // Need to reduce over the entire cluster | ||
| int const blockRank = cluster.block_rank(); | ||
| // Every CTA of the cluster must have started before another CTA writes its shared memory. | ||
| cluster.sync(); |
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🩺 Stability & Availability | 🟠 Major | 🏗️ Heavy lift
🔎 Supported by static analysis
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Keep padded threads in both cluster collectives.
For 1,025 packed accesses, adjustGridConfig<true> can launch two CTAs with 513 threads each. The final padded thread returns before this cluster.sync() and the later cluster barrier, so the other threads can block. This stall was already reachable at the existing barrier before this change. Keep padded threads in the cluster collectives and guard only their data accesses.
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Review comment at
@cpp/tensorrt_llm/kernels/communicationKernels/mnnvlAllreduceKernels.cu at line
715:
Update the kernel’s padded-thread control flow around cluster.sync() so padded
threads do not return before either cluster collective. Keep both barriers
reachable by every thread in the cluster, and guard only the data accesses that
padded threads must skip.
After applying the fix, consider running `coderabbit review --agent` for local
review. Visit https://docs.coderabbit.ai/cli?utm_source=ghpr
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No change in this PR:
- No hang.
cluster.sync()andcluster.barrier_wait(cluster.barrier_arrive())arebarrier.cluster.arrive/
barrier.cluster.wait. Per the PTX ISA,barrier.cluster.wait"causes the executing thread to wait for all
non-exited threads of the cluster to perform barrier.cluster.arrive". Forexit, it says: "Barriers exclusively
waiting on arrivals from exited threads are always released." The same applies to the__syncthreads()in
blockReduceSum.- The padded thread returns at :624-626, after its last CTA-wide step (
flag.ctaArrive()at :619). So no barrier
waits on it. rmsNormLamport, the other kerneladjustGridConfig<true>sizes, has no early return. Its padded threads guard
each access and reach both barriers.
- Pre-existing, unchanged here. Main (ca37c9f) has the same
if (!inBounds) return;(:623-625) ahead of its
cluster barrier at :718. This PR'scluster.sync()is on the same side of that return as main's barrier. - Not reached by real hidden sizes.
adjustGridConfig<true>pads a one-shot launch only for a hidden size above 8192 for 2-byte types (4096 for
fp32) that is not a multiple of 64 (32) elements. For example, 8200 is 1,025 accesses, giving 2 x 513 threads: the
case above.- We checked exhaustively up to 131072, for SM counts 132 / 148 / 152 / 160: a hidden size that is a multiple of
64 never pads, at any token count. Kimi K3's 7168 and the MNNVL tests' sizes (8, 2880, 7168, 7176, 8192, 16384)
never pad.
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Since both RMSNorm-fused kernels count Lamport arrivals per CTA, nothing instantiates LamportFlags<..., true>. Remove the UseCGA template parameter, the cluster branches of ctaArrive and waitAndUpdate, and the cooperative_groups include and alias that only they used. Also delete the commented-out cluster.sync() placeholders that the added cluster.sync() calls replace. No functional change: every kernel already took the per-CTA path. Signed-off-by: Vasanth Sabavat <vsabavat@nvidia.com>
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@juney-nvidia could you please |
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Hi @vsabavat, I've re-triggered CI, but this PR still needs approval from trt-llm-kernels-devs. You may ping them as well. |
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PR_Github #76534 [ run ] triggered by Bot. Commit: |
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Thanks, @lori-ren, for the review and for re-triggering CI. @zongfeijing @zhaoyangwang-nvidia, could you please review this PR for trt-llm-kernels-devs when you have a moment? It changes how the RMSNorm-fused MNNVL all-reduce kernels use the cluster barrier, and it still needs a kernels-devs approval. Thank you! |
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PR_Github #76534 [ run ] completed with state
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Superseded by the consolidated draft PR: #19988. Source commits and follow-ups are retained; prior reviews remain historical evidence, not approval of the replacement heads. |
Description
Two synchronization fixes in the RESIDUAL_RMS_NORM epilogue of the MNNVL all-reduce kernels
(
cpp/tensorrt_llm/kernels/communicationKernels/mnnvlAllreduceKernels.cu):oneshotAllreduceFusionKernel, andrmsNormLamportwhen it runs with clusters.1. One cluster-barrier phase per thread.
LamportFlags<..., true>::ctaArrive(common/lamportUtils.cuh) has every thread arrive onthe cluster barrier, but only cluster rank 0's first warp waits. The same threads then arrive again in the RMSNorm
cluster reduction,
cluster.barrier_wait(cluster.barrier_arrive()). The CUDA programming guide requires each threadto arrive and wait once per phase. A second arrive that counts toward the first phase does two kinds of damage:
buffer (a hang).
the one-shot at 1 token (clusters of 8) and the two-shot +
rmsNormLamport(clusters of 4 and 2), at 4 and at 2ranks, each until the 300 s timeout (the GPUs of the one stall sampled sat at 100% utilization). The same calls
pass natively.
of the cluster barrier.
LamportFlags' cluster-arrival mode (UseCGA), which nothing uses any more, is removed.2. Every CTA of the cluster starts before another writes its shared memory.
(
cluster.map_shared_rank(&sharedVal[0], threadIdx.x)[blockRank] = blockSum) before any cluster-barrier wait. Thetarget CTA may not have started yet. The guide requires every CTA of the cluster to have started before its shared
memory is accessed.
that might not have entered yet". That was 56 per rank in each kernel, and 4,496 in a full MNNVL test set, all at
these two writes.
cluster.sync()before the writes, in both kernels. It replaces a commented-outcluster.sync()placeholder after the write.
Outputs: no wrong output was seen natively before the fix; this makes the order the programming model requires
explicit.
Test Coverage
No new unit test: the fixed orderings show only under racecheck's schedule, or as a stall that native runs did not
hit.
On GB200, with this branch built on main:
rmsNormLamportat 32 tokens on 4 ranks (clusters of 4), and at 37 and 64 tokens on2 ranks (clusters of 4 and 2).
test_mnnvl_row_linear_residual_norm_fusion: the 42 RESIDUAL_RMS_NORM cases oftests/unittest/_torch/multi_gpu/test_mnnvl_allreduce.py(through its per-rank bodies) pass at 4 and 2 ranks.They exercise clusters of 1, 4 and 8 in the one-shot kernel and 1, 2, 4 and 8 in
rmsNormLamport.On main, with the same harness: the four racecheck runs stall (see Before), and natively the same calls and the 42
cases pass with the same launch configurations.
Manual 16-rank reference
Not run on this exact build. On 16 ranks (4 GB200 trays in one NVL72 rack), racecheck of a downstream build that
carries both fixes reported 0 hazards on all 16 ranks for the fused two-shot +
rmsNormLamportcall. In that buildtwoshotAllreduceKernel,rmsNormLamport, their launcher andlamportUtils.cuhmatch this branch's source; itsoneshotAllreduceFusionKerneldiffers, so there is no 16-rank result for the one-shot kernel.PR Checklist
Please review the following before submitting your PR:
PR description clearly explains what and why. If using CodeRabbit's summary, please make sure it makes sense.
PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.
Test cases are provided for new code paths (see test instructions) (No new code path; the existing MNNVL tests cover the outputs, and the evidence is racecheck's.)
If PR introduces API changes, an appropriate PR label is added - either
api-compatibleorapi-breaking. Forapi-breaking, includeBREAKINGin the PR title. (No API change.)Any new dependencies have been scanned for license and vulnerabilities (No new dependencies.)
CODEOWNERS updated if ownership changes (No ownership change.)
Documentation updated as needed (No user-facing change.)
Update tava architecture diagram if there is a significant design change in PR. (No design change.)
The reviewers assigned automatically/manually are appropriate for the PR. (To check once the PR is open.)
Please check this after reviewing the above items as appropriate for this PR.
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/bot help.Dev Engineer Review
LamportFlagsno longer has theUseCGAtemplate parameter or cluster-arrival path.ctaArriveuses CTA barriers and counters, andwaitAndUpdateuses the grid’s CTA count. The RMSNorm kernels retaincluster.sync()before writing partial sums to peer shared memory; they remove obsolete commented-out calls after those writes. No review findings were supplied.The author reports that all 42
RESIDUAL_RMS_NORMcases passed at 2 and 4 ranks, and racecheck found zero hazards in the listed configurations. These results are author-reported. Both triggered CI runs reported failures; specific test results were not supplied.QA Engineer Review
No test changes.
Per-File QA Perspective
cpp/tensorrt_llm/common/lamportUtils.cuh: RemovingUseCGAchanges theLamportFlagstemplate API and removes cluster-arrival behavior for all callers. Verify all call sites compile and use the CTA synchronization path.cpp/tensorrt_llm/kernels/communicationKernels/mnnvlAllreduceKernels.cu: The one-shot and two-shot kernels constructLamportFlagswithout a template boolean. RMSNorm reduction retains the cluster synchronization before peer shared-memory writes and the subsequent cluster barrier; verify racecheck and RMSNorm outputs across supported cluster sizes.