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serve: Hadamard-rotated files run 1024-token micro-batches - #205

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hadamard-ub1024
Sep 28, 2026
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hadamard-ub1024

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W4A4 prefill +6-10% for free: llama-bench pp2048 2,001 -> 2,158, pp16384 1,227 -> 1,283 (ub 2048 is no better, decode unchanged). Through 1bit serve --long-model, the 16K first token comes at 12.96 s instead of 13.89 s. tests/hadamard_route.sh checks the flag. Also measured: flash attention off drops pp16384 to 337, so llama-server's default -fa auto (on) must stay.

🤖 Generated with Claude Code

llama-bench, Qwen3-Coder-30B-A3B Q4_0-H32, W4A4: pp2048 2,001 -> 2,158,
pp16384 1,227 -> 1,283 (ub 2048 is no better); decode unchanged (79.2,
49.8 at 16K depth). Through `1bit serve --long-model`, server prefill
2,000/1,607/1,221 -> 2,217/1,742/1,295 at 2K/8K/16K; 16K TTFT 12.96 s.
hadamard_route.sh checks the flag.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Incorrect micro-batch size for Hadamard-rotated models

The PR introduces a hardcoded -ub 1024 for Hadamard-rotated Q4_0 models, but this value should be configurable or validated against the actual hardware capabilities. The performance gains claimed (6-10% for prefill) are specific to certain models and conditions, and the micro-batch size may not be optimal for all hardware configurations or use cases.

// 1024-token micro-batches: prompt processing +3-8% over the default 512 (Qwen3-Coder-30B-A3B,
// pp2048 2,001 -> 2,158, pp16384 1,227 -> 1,283; 2048 is no better), decode unchanged
argv.insert(argv.end(), {"-ub", "1024"});
Unverified performance claims

The documentation states performance improvements of 6-10% for prefill with -ub 1024, but these numbers are not verified for all hardware configurations or model types. The claim should be supported by measurements across different setups to ensure correctness.

side 2-5% against the W4A4 row. A rotated file now runs 1024-token micro-batches (`-ub 1024`),
which raises the W4A4 prefill 6-10% (server-reported 2,217 / 1,742 / 1,295 tok/s at 2K / 8K /
16K, from 2,000 / 1,607 / 1,221): a 16K-token prompt's first token at 12.96 s instead of 13.89. Both files stay loaded (here 17 + 16 GiB). It needs the Vulkan

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bong-water-water-bong merged commit 4b5e2a7 into main Sep 28, 2026
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bong-water-water-bong deleted the hadamard-ub1024 branch September 28, 2026 19:22
bong-water-water-bong added a commit that referenced this pull request Sep 29, 2026
#229)

Qwen3.8-27B-H32 through `1bit serve --dflash`, 1,838-token prompt: 445 ->
477 tok/s best (439 -> 472 median; 497 without a drafter), decode unchanged
(41.1 / 26.7 / 15.0 tok/s code / prose / short).

- ROCmFPX pin -> b82c8b8 (ROCmFPX#4): the chunked delta-net prefill kernel
  writes the rollback snapshots speculative decoding keeps, so a drafter no
  longer drops prompts onto the per-token kernel; layer inputs land at their
  micro-batch's offset, so the DFlash encoder reads the right hidden states on
  prompts longer than one micro-batch.
- serve --dflash drafts the drafter's dflash.block_size - 1 tokens (16 when the
  file does not say) instead of 16. That is also the rollback depth: 16
  against DFlash2's block of 8 wrote twice the snapshots.
- -ub 1024 (#205) only for rotated MoE files: the dense 27B serves 491-495
  tok/s with 512 and 471-473 with 1024.
- tests/hadamard_route.sh: dense/MoE micro-batch and block-size cases (13/13).
- docs/lean.md, docs/serve.md, README status, site description.

Co-authored-by: bong-water-water-bong <bong-water-water-bong@1bit.gg>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
bong-water-water-bong added a commit that referenced this pull request Sep 29, 2026
…a, every number measured (#233)

The loop ROCm Hyperloom (AMD-AGI) runs on Instinct GPUs, applied to how the engine
already works: the harness measures, a setting is kept with its measurement, and
the next model starts from what is known.

- config/recipes.json + app/recipes.{h,cpp}: tuned llama-server settings per
  model and route, each with why / measured / source. `1bit serve` applies the
  ones that match (device, architecture, MoE, Hadamard stamp, drafter), never
  over a flag it already set, and prints each one; --recipes FILE replaces the
  built-in set, --no-recipes turns them off, a malformed file stops serve with
  the reason. The two tuned settings that were code move in:
  rotated-moe-ub1024 (#205, #229) and dflash-p-min-0 (#194). What follows
  from the files themselves (Hadamard env, DFlash draft length) stays in code.
- tools/bench.py: A/B-measures `1bit serve` configurations, interleaved rounds,
  the first config as the baseline in the same run, an optional box flock,
  best/median, JSON record. Qwen3.8-27B-H32, 2 rounds: base 494 tok/s prompt,
  13.1 / 13.1 / 13.5 decode; --dflash 467 (-5.6%), 40.7 / 26.4 / 14.7.
- tools/kernelforge/gdn-prefill: the delta-net prefill kernel as a KernelForge
  task for gfx1151 (standalone kernel, float64 oracle: 139 dB, driver with
  KernelForge's contract, program.md on what differs from Instinct, run.sh).
- tests: recipes_route (10 checks) and bench_selftest (4) run without a GPU;
  fake_backend.py reports llama-server timings.
- docs/recipes.md, docs/bench.md; serve.md, README, site nav point to them.

Co-authored-by: bong-water-water-bong <bong-water-water-bong@1bit.gg>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
bong-water-water-bong added a commit that referenced this pull request Nov 5, 2026
…T_ID packet, #205 attention pin, #206 Zamba2-VL) (#1104)

Fork base `1bit/hrx-vulkan-patched` moved 3 commits past the pin engine main carries today (6e42864a6):

- #204 (engine #991) hrx: element-wise expert weights use the 32-value packet in MUL_MAT_ID
- #205 (engine #1078) graph: the fused attention op stays on its layer's device. With a device that claims host
  buffer types (HRX does), `-ngl 0` was silently losing Flash Attention: ggml_backend_sched skips
  FLASH_ATTN_EXT in pass 1 and its pass-3 tie-break then hands the weightless node to backend 0, so
  resolve_fused_ops saw "layer on CPU, FA on HRX0", warned, and set flash_attn = false for the whole context.
  Pinning the node to model.dev_layer(il) keeps FA enabled and running where the K/V cache is (measured on
  Qwen3-4B-IQ4_XS: `-dev HRX0 -fa auto` FA disabled -1.370574 -> FA enabled -1.369900, `-dev none` unchanged
  at -1.084810, `-ngl 8` keeps its offloaded FA nodes).
- #206 (engine #1098) convert: Zamba2-VL (Zamba2 language model + Qwen2.5-VL tower), so the published GGUFs
  have an authoring site.

registry/architectures.json regenerated, and it is not a pin-line-only change: the converter commit adds one
architecture, so `hrx 297 -> 298`, `architectures 297 -> 298`, `mapped 297 -> 298`, with the new row
`Zamba2_VLForConditionalGeneration -> zamba2 (hrx)`. A reader bumping the pin should expect that row.

Checks: tools/registry_build.py --check-pins records the committed pins, tools/check_pins.py ok,
tests/check_pins_test.py, and the fork was compiled and exercised at 391bad862 by its own PR gates (#204,
#205, #206 each merged green). The engine build itself is unchanged - one gitlink and one registry file.

Co-authored-by: bong-water-water-bong <bong-water-water-bong@1bit.gg>
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